公开(公告)号：US20200177171A1

公开(公告)日：2020-06-04

申请号：US16515316

申请日：2019-07-18

Applicant: Nuvoton Technology Corporation

Inventor： Wei-Ling LIN

IPC: H03K5/14 ,  H03K5/135

Abstract: A delay line circuit with a calibration function, includes N delay modules and a calibration module. The N delay modules are serially coupled to each other. The calibration module generates a calibration start signal and a calibration stop signal according to a calibration signal and a clock signal, and the calibration start signal is outputted to the N delay modules, so that the N delay modules output N delay signals according to N control signals and the calibration start signal. The calibration module calibrates the N control signals according to the N delay signals and the calibration stop signal, so that the N delay modules generate N calibrated delay signals according to the N calibrated control signals and the clock signal. A generation time instant of the calibration stop signal is later than a generation time instant of the calibration start signal.

公开(公告)号：US20230152371A1

公开(公告)日：2023-05-18

申请号：US17947641

申请日：2022-09-19

Applicant: Nuvoton Technology Corporation

Inventor： Wei-Ling LIN

IPC: G01R31/317 ,  H03K21/08

CPC classification number: G01R31/31727 ,  H03K21/08

Abstract: A clock monitor circuit includes a monitor and a tunable counter. The monitor can monitor a clock under test. The tunable counter can count an integer according to a reference clock and set a target number. If a stable signal relative to the clock under test is toggled, the tunable counter can switch the target number from a large number to a small number. The tunable counter can perform an automatic detection process, so as to transmit a check signal to the monitor. In response to the check signal, if the clock under test is undetectable, the monitor will not transmit any confirmation signal back to the tunable counter, and the tunable counter will gradually increase the integer. When the integer is equal to the target number, the tunable counter generates a failure signal.

公开(公告)号：US20240404603A1

公开(公告)日：2024-12-05

申请号：US18401467

申请日：2023-12-30

Applicant: Nuvoton Technology Corporation

Inventor： Wei-Ling LIN ,  Chia-Hao HUANG ,  Tsun-Yao FAN

IPC: G11C16/22 ,  G11C16/14

Abstract: A control circuit including a storage circuit, a register, and a write protection logic circuit is provided. The storage circuit stores data, an enable-set value and a mode-set value. The register stores a protection-set value. The write protection logic circuit determines whether to change at least one of the enable-set value, the mode-set value, and the protection-set value according to the mode-set value after receiving a write command. In response to the mode-set value matching a pre-determined value, the write protection logic circuit changes at least one of the enable-set value, the mode-set value, and the protection-set value according to the protection-set value. In response to the mode-set value not matching the pre-determined value, the write protection logic circuit does not change the enable-set value and the mode-set value.