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公开(公告)号:US20240187014A1
公开(公告)日:2024-06-06
申请号:US18285217
申请日:2022-03-31
Applicant: Nordic Semiconductor ASA
Inventor: Henrik FON
Abstract: A circuit portion is provided which is arranged to be operable in a test mode. The circuit portion includes a Successive Approximation Register Analog to Digital Converter, SAR ADC, and an input for a reference signal. The SAR ADC is arranged to generate a feedback signal having a duty cycle representing a time taken for the SAR ADC to complete an analogue to digital conversion. The SAR ADC can carry out a comparison of a duty cycle of the reference signal with the duty cycle of the feedback signal, and can generate an output signal comprising a digital representation of the comparison of the reference duty cycle and the feedback duty cycle.
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2.
公开(公告)号:US20240259040A1
公开(公告)日:2024-08-01
申请号:US18576709
申请日:2022-07-05
Applicant: Nordic Semiconductor ASA
Inventor: Henrik FON
CPC classification number: H04B1/1607 , H04B1/04 , H04B5/43
Abstract: An electronic device for processing near-field communication signals includes first and second antenna connection terminals for connection to a near-field antenna, a linear load and a voltage clamp, each connected between said connection terminals. A current flowing through the linear load has a substantially linear, positive relationship with a voltage across the linear load, defining a conductance of the linear load. The conductance of the linear load is adjustable. The voltage clamp has an adjustable clamping voltage. The electronic device also includes a peak detector arranged to detect an amplitude of an incoming near-field communication signal across said antenna connection terminals, and a control circuit arranged to adjust the conductance of the linear load and the clamping voltage of the voltage clamp based on the amplitude detected by the peak detector, so as to regulate the voltage swing across the antenna connection terminals.
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