Semiconductor device with high withstand voltage and a drain layer having a highly conductive region connectable to a diffused source layer by an inverted layer
    1.
    发明授权
    Semiconductor device with high withstand voltage and a drain layer having a highly conductive region connectable to a diffused source layer by an inverted layer 有权
    具有高耐压的半导体器件和具有可通过反相层连接到扩散源极层的高导电性区域的漏极层

    公开(公告)号:US06563169B1

    公开(公告)日:2003-05-13

    申请号:US09367599

    申请日:1999-08-18

    IPC分类号: H01L2976

    摘要: A highly conductive region 18 serving as a surface of a drain layer 2 of a first conductivity type is diffused more deeply than a main diffused layer 36 and a diffused channel layer 37, and has a small conducting resistance. The highly conductive region 18 is surrounded by a diffused region 40 of a second conductivity type which comprises a diffused base layer 38 and a diffused guard ring layer 13. Therefore, the highly conductive region 18 does not form spherical junctions, and a depletion layer spreading in the highly conductive region 18 extends into the highly conductive region 18. The highly conductive region 18 thus has a high withstand voltage while maintaining the low conducting resistance.

    摘要翻译: 用作第一导电类型的漏极层2的表面的高导电性区域18比主扩散层36和扩散沟道层37更深地扩散,并且具有小的导电电阻。 高导电区域18由第二导电类型的扩散区域40包围,该扩散区域40包括扩散的基极层38和扩散的保护环层13.因此,高导电区域18不形成球形结,耗散层扩展 在高导电区域18中延伸到高导电区域18.因此,高导电区域18具有高耐受电压,同时保持低导电电阻。

    Semiconductor device and method for manufacturing the same
    2.
    发明授权
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号:US08343833B2

    公开(公告)日:2013-01-01

    申请号:US12923555

    申请日:2010-09-28

    申请人: Nobuki Miyakoshi

    发明人: Nobuki Miyakoshi

    IPC分类号: H01L21/336

    摘要: A semiconductor device including a plurality of units having identical structures, each unit includes: a drain electrode; a drift layer that includes a low concentration layer on the drain electrode and a reference concentration layer on the low concentration layer, a gate electrode on the reference concentration layer; a pair of source regions that are provided on an upper surface of the reference concentration layer and in the vicinity of both ends of the gate electrode; a pair of base regions that surround outer surfaces of the source regions; a source electrode electrically connected to the source regions and the base regions; and a pair of depletion-layer extension regions that are respectively provided under the base regions in the reference concentration region. Boundaries between the depletion-layer extension regions and the low concentration layer are positioned lower than a boundary between the reference concentration layer and the low concentration layer.

    摘要翻译: 一种半导体器件,包括具有相同结构的多个单元,每个单元包括:漏电极; 包括漏电极上的低浓度层和低浓度层上的参考浓度层的漂移层,参考浓度层上的栅电极; 一对源区,设置在所述参考浓度层的上表面上,并且位于所述栅电极的两端附近; 围绕所述源区域的外表面的一对基区; 源极电极,与源极区域和基极区域电连接; 以及分别设置在基准浓度区域的基极区域的一对耗尽层延伸区域。 耗尽层延伸区域和低浓度层之间的边界定位成低于参考浓度层和低浓度层之间的边界。

    Field effect transistor having high breakdown withstand capacity
    3.
    发明授权
    Field effect transistor having high breakdown withstand capacity 失效
    具有高击穿耐受能力的场效应晶体管

    公开(公告)号:US06369424B1

    公开(公告)日:2002-04-09

    申请号:US09595910

    申请日:2000-06-20

    IPC分类号: H01L2976

    摘要: A field effect transistor having a high breakdown withstand capacity is provided. An active region 7a is surrounded by a fixed potential diffusion layer 16, and a channel region 15 is formed in the active region 7a. A gate pad 35 is provided outside the fixed potential diffusion layer 16. Minority carriers injected at a peripheral region of the active region 7a flow into the fixed potential diffusion layer 16, which prevents breakdown attributable to concentration of the carriers. The fixed potential diffusion layer 16 is surrounded by a plurality of guard ring diffusion layers 171 through 174, and a pad diffusion layer 18 formed in a position under the gate pad 35 is connected to the innermost guard ring diffusion layer 171. Since this encourages expansion of a depletion layer under the gate pad 35, an increased breakdown voltage is provided.

    摘要翻译: 提供具有高击穿耐受能力的场效应晶体管。 有源区域7a被固定电位扩散层16包围,并且在有源区域7a中形成沟道区域15。 栅极焊盘35设置在固定电位扩散层16的外侧。在有源区域7a的周围区域注入的少量载流子流入固定电位扩散层16,防止由载流子浓度引起的破坏。 固定电位扩散层16被多个保护环扩散层171至174包围,并且形成在栅极焊盘35下方的焊盘扩散层18连接到最内侧的保护环扩散层171.由于这鼓励扩展 在栅极焊盘35下方的耗尽层,提供了增加的击穿电压。

    Semiconductor device and method for manufacturing the same
    4.
    发明授权
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号:US07923771B2

    公开(公告)日:2011-04-12

    申请号:US12517479

    申请日:2007-12-07

    申请人: Nobuki Miyakoshi

    发明人: Nobuki Miyakoshi

    IPC分类号: H01L29/66

    摘要: A semiconductor device (10) of the present invention includes: a drift layer (5) that includes a reference concentration layer (4) including an impurity of a first conductive type at a first reference concentration and a low concentration layer (3) provided under the reference concentration layer and including an impurity of the first conductive type at a concentration lower than the first reference concentration; a gate electrode (20) that is formed on an upper surface of the reference concentration layer; a pair of source regions (Sa and 8b) that are respectively provided on the reference concentration layer in the vicinity of ends of the gate electrode and include an impurity of the first conductive type at a concentration higher than the first reference concentration.

    摘要翻译: 本发明的半导体器件(10)包括:漂移层(5),其包括参考浓度层(4),所述参考浓度层包括第一参考浓度的第一导电类型的杂质和设置在第一基准浓度下的低浓度层(3) 所述参考浓度层并且包含浓度低于所述第一参考浓度的所述第一导电类型的杂质; 形成在所述基准浓度层的上表面上的栅电极(20) 一对源极区域(Sa和8b),其分别设置在栅电极的端部附近的参考浓度层上,并且包含浓度高于第一基准浓度的第一导电类型的杂质。

    Semiconductor device and method for manufacturing the same
    5.
    发明申请
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号:US20110039382A1

    公开(公告)日:2011-02-17

    申请号:US12923555

    申请日:2010-09-28

    申请人: Nobuki Miyakoshi

    发明人: Nobuki Miyakoshi

    IPC分类号: H01L21/336

    摘要: A semiconductor device including a plurality of units having identical structures, each unit includes: a drain electrode; a drift layer that includes a low concentration layer on the drain electrode and a reference concentration layer on the low concentration layer, a gate electrode on the reference concentration layer; a pair of source regions that are provided on an upper surface of the reference concentration layer and in the vicinity of both ends of the gate electrode; a pair of base regions that surround outer surfaces of the source regions; a source electrode electrically connected to the source regions and the base regions; and a pair of depletion-layer extension regions that are respectively provided under the base regions in the reference concentration region. Boundaries between the depletion-layer extension regions and the low concentration layer are positioned lower than a boundary between the reference concentration layer and the low concentration layer.

    摘要翻译: 一种半导体器件,包括具有相同结构的多个单元,每个单元包括:漏电极; 包括漏电极上的低浓度层和低浓度层上的参考浓度层的漂移层,参考浓度层上的栅电极; 一对源区,设置在所述参考浓度层的上表面上,并且位于所述栅电极的两端附近; 围绕所述源区域的外表面的一对基区; 源极电极,与源极区域和基极区域电连接; 以及分别设置在基准浓度区域的基极区域的一对耗尽层延伸区域。 耗尽层延伸区域和低浓度层之间的边界定位成低于参考浓度层和低浓度层之间的边界。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20100013007A1

    公开(公告)日:2010-01-21

    申请号:US12517479

    申请日:2007-12-07

    申请人: Nobuki Miyakoshi

    发明人: Nobuki Miyakoshi

    IPC分类号: H01L29/78 H01L21/336

    摘要: A semiconductor device (10) of the present invention includes: a drift layer (5) that includes a reference concentration layer (4) including an impurity of a first conductive type at a first reference concentration and a low concentration layer (3) provided under the reference concentration layer and including an impurity of the first conductive type at a concentration lower than the first reference concentration; a gate electrode (20) that is formed on an upper surface of the reference concentration layer; a pair of source regions (8a and 8b) that are respectively provided on the reference concentration layer in the vicinity of ends of the gate electrode and include an impurity of the first conductive type at a concentration higher than the first reference concentration; a pair of base regions (7a and 7b) that respectively surround outer surfaces of diffusion layers of the source regions and include an impurity of the second conductive type at a second reference concentration; a source electrode (14) that is electrically connected to the source regions and the base regions; a pair of depletion-layer extension regions (6a and 6b) that are respectively provided in the reference concentration layer under diffusion layers of the base regions and include an impurity of the second conductive type at a concentration lower than the second reference concentration; a drain layer (2) that is provided on a lower surface of the low concentration layer and includes an impurity of the first conductive type at a concentration higher than the first reference concentration; and a drain electrode (1) that is provided on a lower surface of the drain layer, a voltage being applied between the source electrode and the drain electrode. The lower surfaces of the depletion-layer extension regions are deeper than a boundary between the low concentration layer and the reference concentration layer, and intrude into the low concentration layer.

    Field effect transistor with high withstand voltage and low resistance
    7.
    发明授权
    Field effect transistor with high withstand voltage and low resistance 有权
    具有高耐压和低电阻的场效应晶体管

    公开(公告)号:US06635926B2

    公开(公告)日:2003-10-21

    申请号:US09908540

    申请日:2001-07-20

    IPC分类号: H01L2978

    摘要: A field effect transistor with a high withstand voltage and a low resistance is provided. A ring-shaped channel region is disposed inside a source region formed in a ring, and the inside of the channel region is taken as a drain region. A depletion layer extends toward the inside of the drain region, resulting in a high withstand voltage. In the portion, except the portion within a prescribed distance from the corner portion of the channel region, a low resistance conductive layer is disposed, thereby resulting in high withstand voltage.

    摘要翻译: 提供具有高耐受电压和低电阻的场效应晶体管。 环形沟道区域设置在形成在环中的源极区域内,并且沟道区域的内部被作为漏极区域。 耗尽层朝向漏极区域的内部延伸,导致高的耐受电压。 在该部分中,除了距通道区域的角部规定距离内的部分,设置低电阻导电层,从而导致高耐压。