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公开(公告)号：US10559560B2
公开(公告)日：2020-02-11
申请号：US16229802
申请日：2018-12-21
发明人： Fang-Wen Liu , Tseng-Fu Lu , Wei-Ming Liao
摘要： The present disclosure provides a semiconductor ESD protection device. The semiconductor ESD protection device includes a substrate including a first conductivity type, a gate formed on the substrate, a source region and a drain region formed in the substrate, and a body region formed in the substrate. The substrate and the body region include a first conductivity type. The source region and the drain region include a second conductivity type. And the first conductivity type and the second conductivity type are complementary to each other. The body region is electrically connected to the gate.
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公开(公告)号：US11037921B2
公开(公告)日：2021-06-15
申请号：US16653979
申请日：2019-10-15
发明人： Fang-Wen Liu , Tseng-Fu Lu
摘要： An off chip driver structure includes a plurality of pull-up transistors, a plurality of pull-down transistors, a plurality of first regions of a first type, a plurality of second regions of a second type and a plurality of resistor components. The first regions and the second regions are staggered to form an electrostatic discharge (ESD) component. One of the resistor components is coupled to one of the pull-up transistors or one of the pull-down transistors, the resistor components are arranged between the first regions and the second regions.
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公开(公告)号：US10242978B1
公开(公告)日：2019-03-26
申请号：US15794834
申请日：2017-10-26
发明人： Fang-Wen Liu , Tseng-Fu Lu , Wei-Ming Liao
摘要： The present disclosure provides a semiconductor ESD protection device. The semiconductor ESD protection device includes a substrate including a first conductivity type, a gate formed on the substrate, a source region and a drain region formed in the substrate, and a body region formed in the substrate. The substrate and the body region include a first conductivity type. The source region and the drain region include a second conductivity type. And the first conductivity type and the second conductivity type are complementary to each other. The body region is electrically connected to the gate.
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公开(公告)号：US11955474B2
公开(公告)日：2024-04-09
申请号：US17892797
申请日：2022-08-22
发明人： Fang-Wen Liu
CPC分类号： H01L27/0288 , H01L27/0266 , H01L27/0292 , H01L27/0296 , H02H9/045
摘要： An electrostatic discharge (ESD) protection circuit is provided. The protection circuit includes a MOS transistor and a resistor. The MOS transistor is electrically coupled to a core circuit. The resistor is electrically coupling to a gate of the MOS transistor for creating a bias on the gate to directing an ESD current to a ground when an ESD event occurs on the core circuit. A layout of the MOS transistor is spaced apart from a layout of the core circuit by a layout of a dummy structure. The resistor is formed by utilizing a portion of the dummy structure.
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公开(公告)号：US11935886B2
公开(公告)日：2024-03-19
申请号：US18209090
申请日：2023-06-13
发明人： Fang-Wen Liu
CPC分类号： H01L27/0288 , H01L27/0266 , H01L27/0292 , H01L27/0296 , H02H9/045
摘要： An electrostatic discharge (ESD) protection circuit is provided. The protection circuit includes a MOS transistor and a resistor. The MOS transistor is electrically coupled to a core circuit. The resistor is electrically coupling to a gate of the MOS transistor for creating a bias on the gate to directing an ESD current to a ground when an ESD event occurs on the core circuit. A layout of the MOS transistor is spaced apart from a layout of the core circuit by a layout of a dummy structure. The resistor is formed by utilizing a portion of the dummy structure.
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公开(公告)号：US10580765B1
公开(公告)日：2020-03-03
申请号：US16207185
申请日：2018-12-02
发明人： Fang-Wen Liu , Tseng-Fu Lu
摘要： A semiconductor structure includes a silicon control rectifier (SCR) region and a NPN region adjacent to the SCR region. The silicon control rectifier (SCR) region includes a first p-well region, a first n-well region surrounded by the first p-well region and a first P+ region in the first p-well region and spaced apart from the first n-well region. The NPN region includes a second p-well region, a first N+ region, a second N+ region and a second P+ region. The first N+ region is coupled to the second p-well region and an electrostatic discharge source. The second N+ region is coupled to the second p-well region and spaced apart from the first N+ region. The second P+ region is disposed in the second p-well region and equipotentially connected to the first P+ region in the first p-well region.
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公开(公告)号：US10418356B2
公开(公告)日：2019-09-17
申请号：US15957425
申请日：2018-04-19
发明人： Fang-Wen Liu , Tseng-Fu Lu
摘要： The present disclosure provides a diode structure and an electrostatic discharge (ESD) protection circuit including the same. The diode structure includes a P-type substrate. The diode structure further includes a plurality of wavy N-doping regions formed on the P-type substrate. Each of the wavy N-doping regions extends in a first direction and has an N-doping width in a second direction perpendicular to the first direction. The diode structure further includes a plurality of wavy P-doping regions formed on the P-type substrate. Each of the wavy P-doping regions extends in the first direction and has a P-doping width in the second direction. The N-doping widths are essentially identical at different positions along the first direction, and the P-doping widths are essentially identical at different positions along the first direction.
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