Resistor ladder digital-to-analog converter with mismatch correction and method therefor

    公开(公告)号:US10014873B1

    公开(公告)日:2018-07-03

    申请号:US15714230

    申请日:2017-09-25

    Applicant: NXP B.V.

    CPC classification number: H03M1/0604 H03M1/066 H03M1/765 H03M1/785

    Abstract: A digital-to-analog converter (DAC) includes a plurality of resistive elements connected together in series to form a ring of resistive elements. A node is formed by each of the connections of adjacent resistive elements of the ring. Groups of parallel-connected switches are coupled to each node. A first switch of the group of switches is for selectively coupling a first power supply voltage terminal to the node. A second switch of the group of switches is for selectively coupling a second power supply voltage to the node. A third switch of the group of switches is for selectively coupling an output terminal to the node. A differential or single-ended analog output may be provided. Mismatch induced error is removed using a mismatch error shaping technique that shapes the errors outside a pass-band.

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