公开(公告)号：US11972909B2

公开(公告)日：2024-04-30

申请号：US17666961

申请日：2022-02-08

申请人： Murata Manufacturing Co., Ltd.

发明人： Kazutaka Nakamura ,  Kohei Shimada ,  Takeshi Furukawa ,  Shinji Otani ,  Akitomo Takahashi

IPC分类号： H05K1/18 ,  H01G9/00 ,  H01G9/04 ,  H01G9/042 ,  H01G9/15

CPC分类号： H01G9/042 ,  H01G9/0029 ,  H01G9/15 ,  H05K1/182 ,  H05K2201/10015

摘要： A capacitor disposed inside a multilayer substrate that includes a conductive pattern on a surface thereof and an anode portion having a first conductive metal member and a porous portion disposed on a surface of the first conductive metal member, a cathode portion, and a dielectric layer disposed between the anode portion and the cathode portion. Moreover, the anode portion is led out to a surface side of the multilayer substrate by a connection electrode including an alloy layer containing a metal forming the first conductive metal member and a conductive layer disposed on the alloy layer, and in which the connection electrode is connected to the conductive pattern formed on the surface of the multilayer substrate.