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12 条记录 (耗时 0.015 秒)

    Methods of adjusting gain error in instrumentation amplifiers
    1.
    发明授权
    Methods of adjusting gain error in instrumentation amplifiers 有权

    公开(公告)号：US10439559B2

    公开(公告)日：2019-10-08

    申请号：US16371255

    申请日：2019-04-01

    申请人： Microchip Technology Incorporated

    发明人： Serban Motoroiu ,  Jim Nolan

    IPC分类号： H03F1/12 ,  H03G1/00 ,  H03F1/34 ,  H03F3/45

    摘要： A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

    Automatic Load Share Architecture For Usb Port Power
    2.
    发明申请
    Automatic Load Share Architecture For Usb Port Power 审中-公开
    Usb端口功率的自动负载共享架构

    公开(公告)号：US20150160674A1

    公开(公告)日：2015-06-11

    申请号：US14565919

    申请日：2014-12-10

    申请人： Microchip Technology Incorporated

    发明人： William Burdette ,  Jim Nolan ,  Jimmy Yu

    IPC分类号： G05F1/66 ,  G06F13/20

    CPC分类号： G05F1/66 ,  G06F1/266 ,  G06F1/3203 ,  G06F13/20 ,  G06F13/385 ,  Y02D10/151

    摘要： A method, device and system for efficient allocation of an available current supply to a first and second USB power port. The current drawn by a device connected to the first power port is measured and the first power port designated as a priority port. A first current limit is assigned to the priority port, where the selected first current limit is the lowest available current limit setting that is greater than the measured current draw on the priority port. A second current limit is assigned to the second power port, where the assigned second current limit is the highest available current limit setting that is less than or equal to the available current minus the first current limit. The current drawn on the priority port is periodically measured and the first current limit and the second current limit are adjusted accordingly to efficiently distribute the available current.

    摘要翻译： 一种用于有效地将可用电流供应分配给第一和第二USB电源端口的方法，装置和系统。 测量由连接到第一电源端口的设备抽取的电流，并将第一电源端口指定为优先端口。 第一个电流限制被分配给优先端口，其中所选择的第一电流限制是比优先端口上测量的电流消耗大的最低可用电流限制设置。 分配给第二电源端口的第二个电流限制，其中分配的第二电流限制是小于或等于可用电流减去第一电流限制的最高可用电流限制设置。 定期测量在优先端口上绘制的电流，相应调整第一电流限制和第二电流限制，以有效分配可用电流。

    DEVICE AND SYSTEM FOR ESD PROTECTION
    3.
    发明公开
    DEVICE AND SYSTEM FOR ESD PROTECTION 审中-公开

    公开(公告)号：US20240355809A1

    公开(公告)日：2024-10-24

    申请号：US18520616

    申请日：2023-11-28

    申请人： Microchip Technology Incorporated

    发明人： Dong Wang ,  Jim Nolan ,  HongZhong Xu

    IPC分类号： H01L27/02

    CPC分类号： H01L27/0266 ,  H01L27/0292

    摘要： A circuit for electrostatic discharge (ESD) protection may protect sensitive circuits in the presence of both positive and negative ESD events. A protection transistor may be coupled to a pad, and a protection clamp may be coupled to the protection transistor. The protection transistor may be in an isolation n-well, and a current limiting resistor may be coupled from the pad to the isolation n-well. In operation, the current limiting resistor may limit the current during negative ESD events.

    Dynamic correction of gain error in current-feedback instrumentation amplifiers
    5.
    发明授权
    Dynamic correction of gain error in current-feedback instrumentation amplifiers 有权

    公开(公告)号：US10454438B2

    公开(公告)日：2019-10-22

    申请号：US15901623

    申请日：2018-02-21

    申请人： Microchip Technology Incorporated

    发明人： Serban Motoroiu ,  Jim Nolan

    IPC分类号： H03G3/30 ,  H03F3/45 ,  H03F1/26 ,  H03F1/36 ,  H03G1/00

    摘要： A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a chopping modulator circuit that continuously swaps tail current sources between the transconductors. This tail current swapping reduces the contribution to the CFIA's gain error caused by random mismatch between the tail currents of the input and feedback transconductors. The modulator circuit operates on a clock cycle to periodically swap the tail current sources. As a result, even if the tail currents are mismatched, on average the tail currents (transconductor gains) will approximately equal out, and the contribution of the tail current difference to the gain error is canceled out.

    Common Mode Sensing Architecture
    6.
    发明申请
    Common Mode Sensing Architecture 审中-公开

    公开(公告)号：US20190222185A1

    公开(公告)日：2019-07-18

    申请号：US15940709

    申请日：2018-03-29

    申请人： Microchip Technology Incorporated

    发明人： Dong Wang ,  Jim Nolan ,  Kumen Blake ,  Milan Rai

    IPC分类号： H03F3/45 ,  H01B11/10

    摘要： An amplifier includes a differential positive input, a differential negative input, and a transistor. The transistor is communicatively coupled to the differential positive input and differential negative input at a source of the transistor. The transistor is configured to track input common mode of the differential positive input and differential negative input.

    Current sense amplifier architecture and level shifter
    8.
    发明授权
    Current sense amplifier architecture and level shifter 有权

    公开(公告)号：US10564186B2

    公开(公告)日：2020-02-18

    申请号：US15712771

    申请日：2017-09-22

    申请人： Microchip Technology Incorporated

    发明人： Dong Wang ,  Jim Nolan ,  Kumen Blake

    IPC分类号： G01R15/14 ,  G01R1/30 ,  H01L23/60 ,  H03F3/217

    摘要： A high side current sensing amplifier architecture is simplified and improved over prior art current sensing amplifier circuits by using chopping only, without requiring auto-zeroing, and by using a simpler (and faster) switched capacitor filter instead of an auto-zeroing integrator filter. Also, VIP (positive DC sense node) is merged with the VDDHV (power supply) node, such that the integrated circuit package requires only a single node (package pin) to accommodate both the VIP and VDDHV connections for the current sensing amplifier circuit, resulting in being able to use a smaller integrated circuit package. A small resistor is coupled between VIP and VDDHV to reduce the offset considerably. A low latency time high voltage level shifter is provided which is essential for precise chopping operation.