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    SIGMA-DELTA MODULATOR WITH SAR ADC AND TRUNCATER AND RELATED SIGMA-DELTA MODULATION METHOD
    3.
    发明申请
    SIGMA-DELTA MODULATOR WITH SAR ADC AND TRUNCATER AND RELATED SIGMA-DELTA MODULATION METHOD 有权
    具有SAR ADC和TRANCATER的SIGMA-DELTA调制器及相关SIGMA-DELTA调制方法

    公开(公告)号：US20130088376A1

    公开(公告)日：2013-04-11

    申请号：US13691860

    申请日：2012-12-03

    Applicant: Mediatek Inc.

    Inventor： Yu-Hsin Lin ,  Hung-Chieh Tsai ,  Sheng-Jui Huang

    IPC: H03M3/00

    CPC classification number: H03M3/30 ,  H03M3/412 ,  H03M3/426 ,  H03M7/3042

    Abstract: A sigma-delta modulator includes a processing circuit, a quantizer, a truncater and a feedback circuit. The processing circuit receives an input signal and an analog information and generates an integrated signal by perform an integration upon a difference between the input signal and the analog information. The quantizer includes a successive approximation register (SAR) analog-to-digital converter (ADC) for receiving the integrated signal and generating a digital information according to the integrated signal. The truncater receives the digital information and generates a truncated information according to the digital information. The feedback circuit generates the analog information to the processing circuit according to the truncated information.

    Abstract translation: Σ-Δ调制器包括处理电路，量化器，截短器和反馈电路。 处理电路接收输入信号和模拟信息，并通过根据输入信号和模拟信息之间的差进行积分来产生积分信号。 量化器包括用于接收积分信号并根据积分信号产生数字信息的逐次逼近寄存器（SAR）模拟 - 数字转换器（ADC）。 截断器接收数字信息并根据数字信息产生截断的信息。 反馈电路根据截断的信息向处理电路生成模拟信息。

    VCO-BASED CONTINUOUS-TIME SIGMA DELTA MODULATOR EQUIPPED WITH TRUNCATION CIRCUIT AND PHASE-DOMAIN EXCESS LOOP DELAY COMPENSATION
    4.
    发明申请
    VCO-BASED CONTINUOUS-TIME SIGMA DELTA MODULATOR EQUIPPED WITH TRUNCATION CIRCUIT AND PHASE-DOMAIN EXCESS LOOP DELAY COMPENSATION 有权
    基于VCO的连续时间SIGMA DELTA调制器配有TRUNCATION CIRCUIT和相域超越循环延迟补偿

    公开(公告)号：US20160365870A1

    公开(公告)日：2016-12-15

    申请号：US15069951

    申请日：2016-03-14

    Applicant: MEDIATEK INC.

    Inventor： Sheng-Jui Huang ,  Michael A. Ashburn, JR. ,  Divya Kesharwani ,  Nathan Egan

    IPC: H03M3/00

    CPC classification number: H03M3/37 ,  H03M1/86 ,  H03M3/422 ,  H03M3/424 ,  H03M3/428 ,  H03M3/464

    Abstract: A continuous-time sigma-delta modulator includes a VCO-based quantizer, a rotator, a truncation circuit and a digital-to-analog converter (DAC). The VCO-based quantizer is arranged to generate a thermometer code based on an input signal and a feedback signal. The rotator is coupled to the VCO-based quantizer, and is arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern. The truncation circuit is coupled to the rotator, and is arranged to extract a most significant bit (MSB) part from the rearranged thermometer code. The DAC is coupled to the truncation circuit, and is arranged to generate the feedback signal according to at least the MSB part. Two alternative continuous-time sigma-delta modulators are also disclosed.

    Abstract translation: 连续时间Σ-Δ调制器包括基于VCO的量化器，旋转器，截断电路和数模转换器（DAC）。 基于VCO的量化器被布置成基于输入信号和反馈信号生成温度计代码。 旋转器耦合到基于VCO的量化器，并且被布置成基于温度计代码和相移生成相移温度计代码，并且基于相移温度计代码生成重新排列的温度计代码以符合 具体模式。 截断电路耦合到旋转器，并且被布置成从重新排列的温度计代码中提取最高有效位（MSB）部分。 DAC耦合到截断电路，并且被布置成根据至少MSB部分产生反馈信号。 还公开了两种替代的连续时间Σ-Δ调制器。

    Sigma-delta modulator with SAR ADC and truncater and related sigma-delta modulation method
    5.
    发明授权
    Sigma-delta modulator with SAR ADC and truncater and related sigma-delta modulation method 有权
    具有SAR ADC和截尾的Σ-Δ调制器和相关的Σ-Δ调制方法

    公开(公告)号：US08928511B2

    公开(公告)日：2015-01-06

    申请号：US13691860

    申请日：2012-12-03

    Applicant: Mediatek Inc.

    Inventor： Yu-Hsin Lin ,  Hung-Chieh Tsai ,  Sheng-Jui Huang

    IPC: H03M3/00 ,  H03M7/30

    CPC classification number: H03M3/30 ,  H03M3/412 ,  H03M3/426 ,  H03M7/3042

    Abstract: A sigma-delta modulator includes a processing circuit, a quantizer, a truncater and a feedback circuit. The processing circuit receives an input signal and an analog information and generates an integrated signal by perform an integration upon a difference between the input signal and the analog information. The quantizer includes a successive approximation register (SAR) analog-to-digital converter (ADC) for receiving the integrated signal and generating a digital information according to the integrated signal. The truncater receives the digital information and generates a truncated information according to the digital information. The feedback circuit generates the analog information to the processing circuit according to the truncated information.

    Abstract translation: Σ-Δ调制器包括处理电路，量化器，截短器和反馈电路。 处理电路接收输入信号和模拟信息，并通过根据输入信号和模拟信息之间的差进行积分来产生积分信号。 量化器包括用于接收积分信号并根据积分信号产生数字信息的逐次逼近寄存器（SAR）模拟 - 数字转换器（ADC）。 截断器接收数字信息并根据数字信息产生截断的信息。 反馈电路根据截断的信息向处理电路生成模拟信息。

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