Invention Grant
US08928511B2 Sigma-delta modulator with SAR ADC and truncater and related sigma-delta modulation method 有权
具有SAR ADC和截尾的Σ-Δ调制器和相关的Σ-Δ调制方法

  • Patent Title: Sigma-delta modulator with SAR ADC and truncater and related sigma-delta modulation method
  • Patent Title (中): 具有SAR ADC和截尾的Σ-Δ调制器和相关的Σ-Δ调制方法
  • Application No.: US13691860
    Application Date: 2012-12-03
  • Publication No.: US08928511B2
    Publication Date: 2015-01-06
  • Inventor: Yu-Hsin LinHung-Chieh TsaiSheng-Jui Huang
  • Applicant: Mediatek Inc.
  • Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
  • Assignee: Mediatek Inc.
  • Current Assignee: Mediatek Inc.
  • Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
  • Agent Winston Hsu; Scott Margo
  • Main IPC: H03M3/00
  • IPC: H03M3/00 H03M7/30
Sigma-delta modulator with SAR ADC and truncater and related sigma-delta modulation method
Abstract:
A sigma-delta modulator includes a processing circuit, a quantizer, a truncater and a feedback circuit. The processing circuit receives an input signal and an analog information and generates an integrated signal by perform an integration upon a difference between the input signal and the analog information. The quantizer includes a successive approximation register (SAR) analog-to-digital converter (ADC) for receiving the integrated signal and generating a digital information according to the integrated signal. The truncater receives the digital information and generates a truncated information according to the digital information. The feedback circuit generates the analog information to the processing circuit according to the truncated information.
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