公开(公告)号：US09627031B1

公开(公告)日：2017-04-18

申请号：US15067377

申请日：2016-03-11

Applicant: MediaTek Inc.

Inventor： Kai-Hsin Chen ,  Shih-Hsiu Lin

IPC: G11C7/00 ,  G11C11/4076 ,  G11C11/409 ,  G11C7/10 ,  G11C7/22 ,  G11C8/04

CPC classification number: G11C11/4076 ,  G06F13/1689 ,  G11C7/04 ,  G11C7/1006 ,  G11C7/1045 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/1078 ,  G11C7/22 ,  G11C7/227 ,  G11C8/04 ,  G11C11/409 ,  G11C29/022 ,  G11C29/023 ,  G11C29/025 ,  G11C29/028 ,  G11C2207/2254

Abstract: A control method for a memory system is provided. A memory controller of the memory system is configured to control the memory device. After a condition is met, the memory controller performs a retry operation to compensate for shifting of a data strobe signal sent from the memory device until the memory system enters a normal operation mode. When the shifting of the data strobe signal is compensated for, the number of pulses of the data strobe signal in the gating window is equal to the first predetermined number.