公开(公告)号：US20120305930A1

公开(公告)日：2012-12-06

申请号：US13575959

申请日：2011-02-01

申请人： Naoki Makita ,  Hiroki Mori ,  Masaki Saitoh

发明人： Naoki Makita ,  Hiroki Mori ,  Masaki Saitoh

IPC分类号： H01L29/786 ,  H01L21/8238 ,  H01L21/336

CPC分类号： H01L27/1214 ,  H01L27/092 ,  H01L27/1108 ,  H01L27/1222 ,  H01L27/1277 ,  H01L27/1288 ,  H01L29/045 ,  H01L29/78696

摘要： A semiconductor device of the present invention includes an n-channel first thin film transistor and a p-channel second thin film transistor on one and the same substrate. The first thin film transistor has a first semiconductor layer (27), and the second thin film transistor has a second semiconductor layer (22). The first semiconductor layer (27) and the second semiconductor layer (22) are formed from one and the same film. Each of the first semiconductor layer (27) and the second semiconductor layer (22) has a slope portion (27e, 22e) positioned in the periphery and a main portion (27m, 22m) which is a portion excluding the slope portion. A p-type impurity is introduced into only a part of the slope portion (27e) of the first semiconductor layer with higher density than the main portion (27m) of the first semiconductor layer, the main portion (22m) of the second semiconductor layer, and the slope portion (22e) of the second semiconductor layer. Accordingly, a driving voltage of the semiconductor device provided with the n-type TFT and the p-type TFT can be reduced.

摘要翻译： 本发明的半导体器件在同一衬底上包括n沟道第一薄膜晶体管和p沟道第二薄膜晶体管。 第一薄膜晶体管具有第一半导体层（27），第二薄膜晶体管具有第二半导体层（22）。 第一半导体层（27）和第二半导体层（22）由同一膜形成。 第一半导体层（27）和第二半导体层（22）中的每一个具有位于周边的倾斜部分（27e，22e）和除斜坡部分之外的部分的主要部分（27m，22m）。 仅在第一半导体层的倾斜部分（27e）的一部分中，比第一半导体层的主要部分（27m）更高的密度，将第二半导体层的主要部分（22m）引入p型杂质 ，和第二半导体层的倾斜部分（22e）。 因此，可以减小设置有n型TFT和p型TFT的半导体器件的驱动电压。

公开(公告)号：US09349340B2

公开(公告)日：2016-05-24

申请号：US13882938

申请日：2011-11-08

申请人： Masaki Saitoh ,  Naoki Makita

发明人： Masaki Saitoh ,  Naoki Makita

IPC分类号： H01L27/12 ,  G09G3/36 ,  H03K17/06

CPC分类号： G09G3/3696 ,  H01L27/1222 ,  H01L27/127 ,  H01L27/1288 ,  H03K17/063

摘要： In at least one operation control TFT (27N, 27P) in a control circuit (27), an impurity of a type that generates an impurity level of a channel region (33c) is included in the channel region (33c) as a threshold adjustment impurity, and the concentration of the threshold adjustment impurity is made higher than the concentration of the threshold adjustment impurity in channel regions (33c) of other TFTs (21, 25, 28) of the same type, thus causing the absolute value of the threshold voltage to be greater than that of the other TFTs (21, 25, 28) of the same type.

摘要翻译： 在控制电路（27）中的至少一个操作控制TFT（27N，27P）中，在通道区域（33c）中包含产生沟道区域（33c）的杂质电平的类型的杂质作为阈值调整 使阈值调整杂质的浓度高于相同类型的其他TFT（21,25,28）的沟道区域（33c）中的阈值调整杂质的浓度，从而导致阈值的绝对值 电压大于相同类型的其它TFT（21,25,28）的电压。

公开(公告)号：US20130222219A1

公开(公告)日：2013-08-29

申请号：US13882938

申请日：2011-11-08

申请人： Masaki Saitoh ,  Naoki Makita

发明人： Masaki Saitoh ,  Naoki Makita

IPC分类号： G09G3/36 ,  H03K17/06

CPC分类号： G09G3/3696 ,  H01L27/1222 ,  H01L27/127 ,  H01L27/1288 ,  H03K17/063

摘要： In at least one operation control TFT (27N, 27P) in a control circuit (27), an impurity of a type that generates an impurity level of a channel region (33c) is included in the channel region (33c) as a threshold adjustment impurity, and the concentration of the threshold adjustment impurity is made higher than the concentration of the threshold adjustment impurity in channel regions (33c) of other TFTs (21, 25, 28) of the same type, thus causing the absolute value of the threshold voltage to be greater than that of the other TFTs (21, 25, 28) of the same type.

摘要翻译： 在控制电路（27）中的至少一个操作控制TFT（27N，27P）中，在通道区域（33c）中包含产生沟道区域（33c）的杂质电平的类型的杂质作为阈值调整 使阈值调整杂质的浓度高于相同类型的其他TFT（21,25,28）的沟道区域（33c）中的阈值调整杂质的浓度，从而导致阈值的绝对值 电压大于相同类型的其它TFT（21,25,28）的电压。

公开(公告)号：US08901650B2

公开(公告)日：2014-12-02

申请号：US13575959

申请日：2011-02-01

申请人： Naoki Makita ,  Hiroki Mori ,  Masaki Saitoh

发明人： Naoki Makita ,  Hiroki Mori ,  Masaki Saitoh

IPC分类号： H01L29/786 ,  H01L27/12

CPC分类号： H01L27/1214 ,  H01L27/092 ,  H01L27/1108 ,  H01L27/1222 ,  H01L27/1277 ,  H01L27/1288 ,  H01L29/045 ,  H01L29/78696

摘要： A semiconductor device of the present invention includes an n-channel first thin film transistor and a p-channel second thin film transistor on one and the same substrate. The first thin film transistor has a first semiconductor layer (27), and the second thin film transistor has a second semiconductor layer (22). The first semiconductor layer (27) and the second semiconductor layer (22) are formed from one and the same film. Each of the first semiconductor layer (27) and the second semiconductor layer (22) has a slope portion (27e, 22e) positioned in the periphery and a main portion (27m, 22m) which is a portion excluding the slope portion. A p-type impurity is introduced into only a part of the slope portion (27e) of the first semiconductor layer with higher density than the main portion (27m) of the first semiconductor layer, the main portion (22m) of the second semiconductor layer, and the slope portion (22e) of the second semiconductor layer. Accordingly, a driving voltage of the semiconductor device provided with the n-type TFT and the p-type TFT can be reduced.

摘要翻译： 本发明的半导体器件在同一衬底上包括n沟道第一薄膜晶体管和p沟道第二薄膜晶体管。 第一薄膜晶体管具有第一半导体层（27），第二薄膜晶体管具有第二半导体层（22）。 第一半导体层（27）和第二半导体层（22）由同一膜形成。 第一半导体层（27）和第二半导体层（22）中的每一个具有位于周边的倾斜部分（27e，22e）和除斜坡部分之外的部分的主要部分（27m，22m）。 仅在第一半导体层的倾斜部分（27e）的一部分中，比第一半导体层的主要部分（27m）更高的密度，将第二半导体层的主要部分（22m）引入p型杂质 ，和第二半导体层的倾斜部分（22e）。 因此，可以减小设置有n型TFT和p型TFT的半导体器件的驱动电压。

公开(公告)号：US08999823B2

公开(公告)日：2015-04-07

申请号：US13125865

申请日：2009-10-20

申请人： Naoki Makita ,  Hiroshi Nakatsuji

发明人： Naoki Makita ,  Hiroshi Nakatsuji

IPC分类号： H01L27/12 ,  H01L27/146 ,  G09G5/10 ,  G06F3/042 ,  H01L29/786

CPC分类号： H01L27/14665 ,  G06F3/042 ,  G09G5/10 ,  H01L27/12 ,  H01L27/1229 ,  H01L29/78633

摘要： A semiconductor device according to the present invention includes a thin-film transistor and a thin-film diode. The respective semiconductor layers and of the thin-film transistor and the thin-film diode are crystalline semiconductor layers that have been formed by crystallizing the same crystalline semiconductor film. Ridges have been formed on the surface of the semiconductor layer of the thin-film diode. And the semiconductor layer of the thin-film diode has a greater surface roughness than the semiconductor layer of the thin-film transistor.

摘要翻译： 根据本发明的半导体器件包括薄膜晶体管和薄膜二极管。 各半导体层以及薄膜晶体管和薄膜二极管是通过使相同的结晶半导体膜结晶而形成的结晶半导体层。 已经在薄膜二极管的半导体层的表面上形成了脊。 并且薄膜二极管的半导体层具有比薄膜晶体管的半导体层更大的表面粗糙度。

公开(公告)号：US08460954B2

公开(公告)日：2013-06-11

申请号：US13125776

申请日：2009-10-22

申请人： Masaki Yamanaka ,  Hiroshi Nakatsuji ,  Naoki Makita

发明人： Masaki Yamanaka ,  Hiroshi Nakatsuji ,  Naoki Makita

IPC分类号： H01L21/00 ,  H01L21/20 ,  H01L21/36 ,  H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036

CPC分类号： H01L29/66757 ,  G02F1/1368 ,  G02F2001/13312 ,  H01L27/0629 ,  H01L27/12 ,  H01L27/1229 ,  H01L27/1233 ,  H01L27/14612 ,  H01L29/78633 ,  H01L29/861

摘要： A semiconductor device includes a thin film transistor and a thin film diode on a same substrate. A semiconductor layer (109) of the thin film transistor and a semiconductor layer (110) of the thin film diode are crystalline semiconductor layers formed by crystallizing the same non-crystalline semiconductor film. The thickness of the semiconductor layer (110) of the thin film diode is greater than the thickness of the semiconductor layer (109) of the thin film transistor, and the surface of the semiconductor layer (110) of the thin film diode is rougher than the surface of the semiconductor layer (109) of the thin film transistor.

摘要翻译： 半导体器件在同一衬底上包括薄膜晶体管和薄膜二极管。 薄膜晶体管的半导体层（109）和薄膜二极管的半导体层（110）是通过使相同的非晶半导体膜结晶而形成的结晶半导体层。 薄膜二极管的半导体层（110）的厚度大于薄膜晶体管的半导体层（109）的厚度，并且薄膜二极管的半导体层（110）的表面比 薄膜晶体管的半导体层（109）的表面。

公开(公告)号：US20110198608A1

公开(公告)日：2011-08-18

申请号：US13125776

申请日：2009-10-22

申请人： Masaki Yamanaka ,  Hiroshi Nakatsuji ,  Naoki Makita

发明人： Masaki Yamanaka ,  Hiroshi Nakatsuji ,  Naoki Makita

IPC分类号： H01L31/0368 ,  H01L29/786 ,  H01L21/20 ,  H01L29/04 ,  H01L31/14 ,  B82Y99/00

CPC分类号： H01L29/66757 ,  G02F1/1368 ,  G02F2001/13312 ,  H01L27/0629 ,  H01L27/12 ,  H01L27/1229 ,  H01L27/1233 ,  H01L27/14612 ,  H01L29/78633 ,  H01L29/861

摘要： A semiconductor device includes a thin film transistor and a thin film diode on a same substrate. A semiconductor layer (109) of the thin film transistor and a semiconductor layer (110) of the thin film diode are crystalline semiconductor layers formed by crystallizing the same non-crystalline semiconductor film. The thickness of the semiconductor layer (110) of the thin film diode is greater than the thickness of the semiconductor layer (109) of the thin film transistor, and the surface of the semiconductor layer (110) of the thin film diode is rougher than the surface of the semiconductor layer (109) of the thin film transistor.

摘要翻译： 半导体器件在同一衬底上包括薄膜晶体管和薄膜二极管。 薄膜晶体管的半导体层（109）和薄膜二极管的半导体层（110）是通过使相同的非晶半导体膜结晶而形成的结晶半导体层。 薄膜二极管的半导体层（110）的厚度大于薄膜晶体管的半导体层（109）的厚度，并且薄膜二极管的半导体层（110）的表面比 薄膜晶体管的半导体层（109）的表面。

公开(公告)号：US20100181575A1

公开(公告)日：2010-07-22

申请号：US12667465

申请日：2008-06-05

申请人： Naoki Makita ,  Masato Hashimoto

发明人： Naoki Makita ,  Masato Hashimoto

IPC分类号： H01L33/00 ,  H01L29/786 ,  H01L21/336

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L27/1274 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78618

摘要： A semiconductor device includes at least one thin-film transistor 116, which includes: a crystalline semiconductor layer 120 including a region 110 to be a channel region and source and drain regions 113; a gate electrode 107 for controlling the conductivity of the region 110 to be a channel region; a gate insulating film 106 arranged between the semiconductor layer 120 and the gate electrode 107; and source and drain electrodes 115 connected to the source and drain regions 113, respectively. At least one of the source and drain regions 113 contains an element to be a donor or an acceptor and a rare-gas element, but the region 110 to be a channel region does not contain the rare-gas element. The atomic weight of the rare-gas element is greater than that of the element to be a donor or an acceptor. The concentration of the rare-gas element in the at least one region as measured in the thickness direction thereof decreases continuously from the upper surface of the at least one region toward its lower surface.

摘要翻译： 半导体器件包括至少一个薄膜晶体管116，其包括：晶体半导体层120，其包括作为沟道区的区域110以及源极和漏极区113; 用于将区域110的导电性控制为沟道区的栅电极107; 布置在半导体层120和栅电极107之间的栅极绝缘膜106; 以及分别连接到源区113和漏区113的源电极115和漏电极115。 源极区域113和漏极区域113中的至少一个包含作为供体或受体的元素和稀有气体元素，但是作为沟道区域的区域110不含有稀有气体元素。 稀有气体元素的原子量大于作为供体或受体的元素的原子量。 在其厚度方向上测量的至少一个区域中的稀有气体元素的浓度从至少一个区域的上表面向其下表面连续地减小。

公开(公告)号：US07612375B2

公开(公告)日：2009-11-03

申请号：US10421841

申请日：2003-04-24

申请人： Naoki Makita

发明人： Naoki Makita

IPC分类号： H01L29/04 ,  H01L29/76

CPC分类号： H01L27/1229 ,  H01L27/1214 ,  H01L27/127 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757

摘要： A semiconductor device includes at least one thin-film transistor, which includes a semiconductor layer, a gate electrode and a gate insulating film. In the semiconductor layer, a crystalline region, including a channel forming region, a source region and a drain region, is defined. The gate electrode is provided to control the conductivity of the channel forming region. The gate insulating film is provided between the gate electrode and the semiconductor layer. The semiconductor layer includes a gettering region outside of the crystalline region thereof.

摘要翻译： 半导体器件包括至少一个薄膜晶体管，其包括半导体层，栅极电极和栅极绝缘膜。 在半导体层中，限定了包括沟道形成区域，源极区域和漏极区域的结晶区域。 提供栅电极以控制沟道形成区的导电性。 栅极绝缘膜设置在栅电极和半导体层之间。 半导体层包括其结晶区域外的吸杂区域。

公开(公告)号：US07396709B2

公开(公告)日：2008-07-08

申请号：US11780573

申请日：2007-07-20

申请人： Naoki Makita

发明人： Naoki Makita

IPC分类号： H01L21/00

CPC分类号： H01L27/12 ,  H01L27/1285 ,  H01L29/06 ,  H01L29/42384

摘要： A semiconductor device includes a thin film transistor including a semiconductor layer that includes a channel region, a source region and a drain region, a gate insulating film provided on the semiconductor layer, and a gate electrode for controlling the conductivity of the channel region, wherein the surface of the semiconductor layer includes a minute protruding portion, and the side surface inclination angle of the gate electrode is larger than the inclination angle of the protruding portion of the semiconductor layer.

摘要翻译： 半导体器件包括薄膜晶体管，其包括包括沟道区，源极区和漏极区的半导体层，设置在半导体层上的栅极绝缘膜，以及用于控制沟道区的导电性的栅电极，其中 半导体层的表面包括微小突出部分，并且栅电极的侧表面倾斜角度大于半导体层的突出部分的倾斜角度。