IMPEDANCE MATCHING FOR VARIABLE IMPEDANCE ANTENNAS
    1.
    发明申请
    IMPEDANCE MATCHING FOR VARIABLE IMPEDANCE ANTENNAS 有权
    可变阻抗天线的阻抗匹配

    公开(公告)号:US20150288400A1

    公开(公告)日:2015-10-08

    申请号:US14678577

    申请日:2015-04-03

    IPC分类号: H04B1/12 H04W88/06 H04W72/04

    摘要: An impedance matching circuit for a wireless communication device includes: a first node that receives a first impedance; a second node that is connected to an antenna having a second impedance; a first variable capacitor that is connected between the first node and a third node; a second variable capacitor that is connected between the third node and a reference potential; a first inductive element that is connected in parallel with the second variable capacitor between the third node and the reference potential; and a third variable capacitor and a second inductive element that are connected in series between the third node and the second node.

    摘要翻译: 一种用于无线通信设备的阻抗匹配电路包括:第一节点,其接收第一阻抗; 连接到具有第二阻抗的天线的第二节点; 连接在第一节点和第三节点之间的第一可变电容器; 连接在第三节点和参考电位之间的第二可变电容器; 在第三节点和参考电位之间与第二可变电容器并联连接的第一电感元件; 以及串联连接在第三节点和第二节点之间的第三可变电容器和第二电感元件。

    Low-stress cascode structure
    2.
    发明授权
    Low-stress cascode structure 失效
    低应力共源共栅结构

    公开(公告)号:US08742853B2

    公开(公告)日:2014-06-03

    申请号:US13656181

    申请日:2012-10-19

    IPC分类号: H03F3/04

    摘要: An amplifier system comprises a cascode common-source (CS) amplifier including a plurality of transistors connected in a common-source configuration. A stress reducing circuit is connected to at least one of the plurality of transistors to equalize a voltage drop across the plurality of transistors. The stress reducing circuit includes a first transistor including a control terminal, a first terminal and a second terminal. The second terminal of the first transistor is connected to a first terminal of a first one of the plurality of transistors. A capacitance has a first terminal connected to the control terminal of the first transistor and a second terminal connected to a control terminal of a second one of the plurality of transistors.

    摘要翻译: 放大器系统包括共源共栅源(CS)放大器,其包括以共源配置连接的多个晶体管。 应力降低电路连接到多个晶体管中的至少一个,以均衡跨越多个晶体管的电压降。 应力降低电路包括:第一晶体管,包括控制端子,第一端子和第二端子。 第一晶体管的第二端子连接到多个晶体管中的第一晶体管的第一端子。 电容具有连接到第一晶体管的控制端子的第一端子和连接到多个晶体管中的第二晶体管的控制端子的第二端子。

    POWER AMPLIFIER WITH FEEDBACK IMPEDANCE FOR STABLE OUTPUT
    3.
    发明申请
    POWER AMPLIFIER WITH FEEDBACK IMPEDANCE FOR STABLE OUTPUT 有权
    具有反馈阻抗的功率放大器,用于稳定的输出

    公开(公告)号:US20130300507A1

    公开(公告)日:2013-11-14

    申请号:US13946912

    申请日:2013-07-19

    IPC分类号: H03F3/21

    摘要: An amplifier circuit amplifies a signal for wireless transmission. A feedback circuit, including a capacitor, is coupled to the amplifier circuit. Components of the feedback circuit are selected based on a feedback factor such that an input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit.

    摘要翻译: 放大器电路放大用于无线传输的信号。 包括电容器的反馈电路被耦合到放大器电路。 基于反馈因子来选择反馈电路的组件,使得到放大器电路的输入阻抗具有与反馈电路的反馈电路阻抗相同的阻抗特性。

    Power amplifiers with push-pull transistors, capacitive coupling for harmonic cancellation, and inductive coupling to provide differential output signals
    5.
    发明授权
    Power amplifiers with push-pull transistors, capacitive coupling for harmonic cancellation, and inductive coupling to provide differential output signals 有权
    具有推挽晶体管的功率放大器,用于谐波消除的电容耦合和电感耦合以提供差分输出信号

    公开(公告)号:US09246451B2

    公开(公告)日:2016-01-26

    申请号:US14224153

    申请日:2014-03-25

    摘要: A differential power amplifier including a push-pull pair of transistors, a capacitance, a first inductance, and a second inductance. The push-pull pair of transistors includes first and second transistors. The first transistor includes control and output terminals. The second transistor includes input and control terminals. The control terminals of the first and second transistors collectively receive a differential input signal. The output and input terminals collectively provide a differential output signal. The capacitance is connected to the output and input terminals. The first capacitance cancels first harmonics at the output terminal of the first transistor with second harmonics at the input terminal of the second transistor. The first transistor and the first inductance are connected in series between a voltage source and a reference terminal. The second transistor and the second inductance are connected in series between the voltage source and the reference terminal.

    摘要翻译: 一种差分功率放大器,包括推挽晶体管对,电容,第一电感和第二电感。 推挽晶体管对包括第一和第二晶体管。 第一晶体管包括控制和输出端子。 第二晶体管包括输入和控制端子。 第一和第二晶体管的控制端子共同接收差分输入信号。 输出端和输入端共同提供差分输出信号。 电容连接到输出和输入端子。 第一电容在第二晶体管的输入端具有二次谐波的第一晶体管的输出端抵消第一谐波。 第一晶体管和第一电感串联连接在电压源和参考端子之间。 第二晶体管和第二电感串联在电压源和参考端子之间。

    System and method for reducing stress in a cascode common-source amplifier
    6.
    发明授权
    System and method for reducing stress in a cascode common-source amplifier 有权
    用于降低共源共栅源放大器中的应力的系统和方法

    公开(公告)号:US08890623B2

    公开(公告)日:2014-11-18

    申请号:US14288927

    申请日:2014-05-28

    IPC分类号: H03F3/04

    摘要: A method of reducing stress in a cascode common-source amplifier including a first transistor and a second transistor connected in a cascode arrangement. The method includes providing an input voltage and a bias voltage to the first transistor and the second transistor, respectively, connected in the cascode arrangement, generating, based on the input voltage and the bias voltage, an output current, and equalizing stress associated with operation of each of the first transistor and the second transistor. Equalizing the stress includes, in response to the input voltage decreasing by an amount sufficient to cause the first transistor and the second transistor to turn off, equalizing respective voltage drops across the first transistor and the second transistor.

    摘要翻译: 一种降低共源共栅源放大器中的应力的方法,包括以共源共栅结构连接的第一晶体管和第二晶体管。 该方法包括分别以共源共栅结构连接的第一晶体管和第二晶体管提供输入电压和偏置电压,基于输入电压和偏置电压产生输出电流,并且使与操作相关的应力均衡 的第一晶体管和第二晶体管。 应力的均衡包括响应于输入电压减小足以使第一晶体管和第二晶体管关断的量的均衡,使得在第一晶体管和第二晶体管两端的各个电压降相等。

    SYSTEMS AND METHODS FOR OPERATING A POWER AMPLIFIER
    7.
    发明申请
    SYSTEMS AND METHODS FOR OPERATING A POWER AMPLIFIER 审中-公开
    用于操作功率放大器的系统和方法

    公开(公告)号:US20140240046A1

    公开(公告)日:2014-08-28

    申请号:US14269438

    申请日:2014-05-05

    IPC分类号: H03F3/26

    摘要: A power amplifier configured to receive an AC input signal and output, based on the AC input signal, an output voltage via a first output voltage terminal and a second output voltage terminal. The power amplifier includes a first transistor and a second transistor connected in a push-pull configuration, a first inductor, a second inductor, and a first capacitor. The first output voltage terminal is located between the first inductor and the first transistor. The second output voltage terminal is located between the second transistor and ground. The first capacitor is configured to provide a first circuit path between the first output voltage terminal and the second output voltage terminal. The first circuit path functions as a short circuit for even harmonics of a fundamental frequency of the AC input signal but does not function as a short circuit for the fundamental frequency of the AC input signal.

    摘要翻译: 功率放大器,被配置为接收AC输入信号,并且经由第一输出电压端子和第二输出电压端子输出基于AC输入信号的输出电压。 功率放大器包括以推挽配置连接的第一晶体管和第二晶体管,第一电感器,第二电感器和第一电容器。 第一输出电压端子位于第一电感器和第一晶体管之间。 第二输出电压端子位于第二晶体管和地之间。 第一电容器被配置为提供第一输出电压端子和第二输出电压端子之间的第一电路路径。 第一电路路径用作AC输入信号的基频的偶次谐波的短路,但不用作AC输入信号的基频的短路。

    COMBINING SIGNAL POWER USING MAGNETIC COUPLING BETWEEN CONDUCTORS
    8.
    发明申请
    COMBINING SIGNAL POWER USING MAGNETIC COUPLING BETWEEN CONDUCTORS 审中-公开
    使用导体之间的磁耦合组合信号电源

    公开(公告)号:US20140085165A1

    公开(公告)日:2014-03-27

    申请号:US14090283

    申请日:2013-11-26

    发明人: Poh Boon Leong

    摘要: A system including a plurality of amplifiers, a plurality of first transmission lines, and a plurality of second transmission lines. The plurality of first transmission lines have first ends respectively connected to outputs of the plurality of amplifiers and second ends connected to a reference potential. The plurality of second transmission lines have first ends connected to a conductor and second ends that are unconnected. Signals output by the plurality of amplifiers to the plurality of first transmission lines are respectively magnetically coupled to the plurality of second transmission lines.

    摘要翻译: 一种包括多个放大器,多个第一传输线和多个第二传输线的系统。 多个第一传输线具有分别连接到多个放大器和连接到参考电位的第二端的输出的第一端。 多个第二传输线具有连接到导体的第一端和未连接的第二端。 由多个放大器输出到多个第一传输线的信号分别磁耦合到多个第二传输线。

    ACCURATE BIAS TRACKING FOR PROCESS VARIATION AND SUPPLY MODULATION
    9.
    发明申请
    ACCURATE BIAS TRACKING FOR PROCESS VARIATION AND SUPPLY MODULATION 有权
    用于过程变化和供应调制的精确偏差跟踪

    公开(公告)号:US20130300506A1

    公开(公告)日:2013-11-14

    申请号:US13944608

    申请日:2013-07-17

    IPC分类号: H03F3/16

    摘要: A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled.

    摘要翻译: 电流镜包括偏置分支,偏置分支包括串联在电压源和地之间的第一和第二晶体管,耦合在电压源和地之间的分压器,被配置为接收分压器的分压的运算放大器和 在第一和第二晶体管之间的节点的电压,并且驱动第二晶体管的栅极以将节点拉到分压。 电流镜还包括耦合到偏压分支的功率放大器芯。 功率放大器芯包括串联在电压源和地之间的第一和第二驱动晶体管。 第一晶体管和第一驱动晶体管的栅极耦合,并且第二晶体管和第二驱动晶体管的栅极耦合。

    LOW-STRESS CASCODE STRUCTURE
    10.
    发明申请
    LOW-STRESS CASCODE STRUCTURE 失效
    低应力框架结构

    公开(公告)号:US20130099865A1

    公开(公告)日:2013-04-25

    申请号:US13656181

    申请日:2012-10-19

    IPC分类号: H03F1/22 H05K13/04

    摘要: An amplifier system comprises a cascode common-source (CS) amplifier including a plurality of transistors connected in a common-source configuration. A stress reducing circuit is connected to at least one of the plurality of transistors to equalize a voltage drop across the plurality of transistors. The stress reducing circuit includes a first transistor including a control terminal, a first terminal and a second terminal. The second terminal of the first transistor is connected to a first terminal of a first one of the plurality of transistors. A capacitance has a first terminal connected to the control terminal of the first transistor and a second terminal connected to a control terminal of a second one of the plurality of transistors.

    摘要翻译: 放大器系统包括共源共栅源(CS)放大器,其包括以共源配置连接的多个晶体管。 应力降低电路连接到多个晶体管中的至少一个,以均衡跨越多个晶体管的电压降。 应力降低电路包括:第一晶体管,包括控制端子,第一端子和第二端子。 第一晶体管的第二端子连接到多个晶体管中的第一晶体管的第一端子。 电容具有连接到第一晶体管的控制端子的第一端子和连接到多个晶体管中的第二晶体管的控制端子的第二端子。