公开(公告)号：US20160062447A1

公开(公告)日：2016-03-03

申请号：US14811851

申请日：2015-07-29

Applicant: Mediatek Inc.

Inventor： Jih-Ming Hsu ,  Wen-Tsan Hsieh ,  Che-Ming Hsu ,  Yeh-Ji Chou ,  Jen-Chieh Yang ,  Shih-Yen Chiu ,  Wan-Ching Huang ,  Ming-Hsien Lee

IPC: G06F1/32

CPC classification number: G06F1/3243 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: A method and a computer-readable medium for dynamically managing power of a multi-core processor of a computing system are provided. The multi-core processor generates a dynamic voltage and frequency scaling (DVFS) table, determines a first index by alternatively selecting either a power budget or a required performance thereof, determines a current thread level parallelism (TLP) of the computing system, selects one of entries according to the current TLP and the first index, and configure first cores and second cores thereof according to a first settings and a second settings of the selected entry.

Abstract translation: 提供了一种用于动态管理计算系统的多核处理器的功率的方法和计算机可读介质。 多核处理器生成动态电压和频率缩放（DVFS）表，通过交替地选择功率预算或其所需性能来确定第一索引，确定计算系统的当前线程级并行度（TLP），选择一个 根据当前TLP和第一索引的条目，并且根据所选择的条目的第一设置和第二设置来配置第一核心和第二核心。

公开(公告)号：US09665161B2

公开(公告)日：2017-05-30

申请号：US14811851

申请日：2015-07-29

Applicant: MEDIATEK INC.

Inventor： Jih-Ming Hsu ,  Wen-Tsan Hsieh ,  Che-Ming Hsu ,  Yeh-Ji Chou ,  Jen-Chieh Yang ,  Shih-Yen Chiu ,  Wan-Ching Huang ,  Ming-Hsien Lee

IPC: G06F1/00 ,  G06F1/32

CPC classification number: G06F1/3243 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: A method and a computer-readable medium for dynamically managing power of a multi-core processor of a computing system are provided. The multi-core processor generates a dynamic voltage and frequency scaling (DVFS) table, determines a first index by alternatively selecting either a power budget or a required performance thereof, determines a current thread level parallelism (TLP) of the computing system, selects one of entries according to the current TLP and the first index, and configure first cores and second cores thereof according to a first settings and a second settings of the selected entry.

公开(公告)号：US09977699B2

公开(公告)日：2018-05-22

申请号：US14936686

申请日：2015-11-10

Applicant: MediaTek Inc.

Inventor： Jia-Ming Chen ,  Hung-Lin Chou ,  Ya-Ting Chang ,  Shih-Yen Chiu ,  Chia-Hao Hsu ,  Yu-Ming Lin ,  Wan-Ching Huang ,  Jen-Chieh Yang ,  Pi-Cheng Hsiao

IPC: G06F9/46 ,  G06F9/50 ,  G06F1/32

CPC classification number: G06F9/5094 ,  G06F1/3206 ,  G06F1/3287 ,  G06F1/329 ,  G06F2209/505 ,  Y02D10/171 ,  Y02D10/22 ,  Y02D10/24

Abstract: A multi-cluster system having processor cores of different energy efficiency characteristics is configured to operate with high efficiency such that performance and power requirements can be satisfied. The system includes multiple processor cores in a hierarchy of groups. The hierarchy of groups includes: multiple level-1 groups, each level-1 group including one or more of processor cores having identical energy efficiency characteristics, and each level-1 group configured to be assigned tasks by a level-1 scheduler; one or more level-2 groups, each level-2 group including respective level-1 groups, the processor cores in different level-1 groups of the same level-2 group having different energy efficiency characteristics, and each level-2 group configured to be assigned tasks by a respective level-2 scheduler; and a level-3 group including the one or more level-2 groups and configured to be assigned tasks by a level-3 scheduler.

公开(公告)号：US20170322616A1

公开(公告)日：2017-11-09

申请号：US15148031

申请日：2016-05-06

Applicant: MEDIATEK INC.

Inventor： Kuo-Su Hsiao ,  Yen-Lin Lee ,  Shih-Yen Chiu ,  Jia-Ming Chen ,  Mark Shane Peng ,  Ya-Ting Chang

IPC: G06F1/32

CPC classification number: G06F1/3287 ,  G06F1/206 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3243 ,  G06F1/329 ,  G06F1/3293 ,  G06F1/3296 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/152 ,  Y02D10/16 ,  Y02D10/171 ,  Y02D10/172 ,  Y02D10/24

Abstract: Methods and apparatus are provided for adaptive optimization of low-power strategies. In one novel aspect, the device monitors one or more thermal-performance parameters and determines a plurality of operation scenarios for a plurality of corresponding low-power policies. Based on corresponding operation scenarios, the device selects corresponding low-power policy. The device applies different low-power strategy for temperature control based on low-power policies. Different low-power policy is applied to different low-power techniques, such as the DVFS, the CPU hot-plug, and the task migration. In another novel aspect, the device obtains one or more user-defined policy for each corresponding low-power technique. The selection of each low-power policy is further based on its corresponding user-defined policy. In one embodiment, the user-defined DVFS policy includes power policy, performance policy, and DVFS-balanced policy. The user-defined CPU hot-plug policy includes conservative policy, aggressive policy, and hot-plug-balanced policy. The user-defined task-migration policy includes performance policy, and task-migration-balanced policy.

公开(公告)号：US10031574B2

公开(公告)日：2018-07-24

申请号：US14845879

申请日：2015-09-04

Applicant: MediaTek Inc.

Inventor： Jih-Ming Hsu ,  Yen-Lin Lee ,  Jia-Ming Chen ,  Shih-Yen Chiu ,  Chung-Ho Chang ,  Ya-Ting Chang ,  Ming-Hsien Lee

IPC: G06F1/32

Abstract: A computing system includes a multi-core processor and a core controller. The core controller is for: monitoring utilization of the multi-core processor; calculating a target performance index according to the utilization of the multi-core processor, a target utilization and a first performance index, wherein the first performance index is associated with a first entry of a dynamic voltage frequency scaling (DVFS) table that corresponds to a current setting for the multi-core processor; and selecting a second entry of the DVFS table that corresponds to a target-setting according to the target performance index and a second performance index that is associated with the second entry. The target-setting is used to configure the multi-core processor.

公开(公告)号：US20160314024A1

公开(公告)日：2016-10-27

申请号：US15098876

申请日：2016-04-14

Applicant: MediaTek Inc.

Inventor： Ya-Ting Chang ,  Ming-Ju Wu ,  Pi-Cheng Chen ,  Jia-Ming Chen ,  Chung-Ho Chang ,  Pi-Cheng Hsiao ,  Hung-Lin Chou ,  Shih-Yen Chiu

IPC: G06F9/50

CPC classification number: G06F9/5088 ,  G06F1/3203 ,  G06F1/3287 ,  G06F1/329 ,  G06F9/5022 ,  G06F9/5094 ,  Y02D10/171 ,  Y02D10/22 ,  Y02D10/24 ,  Y02D50/20

Abstract: A computing system supports a clearance mode for its processor cores. The computing system can transition a target processor core from an active mode into a clearance mode according to a system policy. The system policy determines the number of processor cores to be in the active mode. The transitioning into the clearance mode includes the operations of migrating work from the target processor core to one or more other processor cores in the active mode in the computing system; and removing the target processor core from a scheduling configuration of the computing system to prevent task assignment to the target processor core. When the target processor core is in the clearance mode, the target processor core is maintained in an online idle state in which the target processor core performs no work.

Abstract translation: 计算系统支持其处理器核心的清除模式。 计算系统可以根据系统策略将目标处理器核心从活动模式转换到清除模式。 系统策略确定处于活动模式的处理器核心数。 过渡到清除模式包括在计算系统中将工作从目标处理器核心迁移到活动模式中的一个或多个其他处理器核心的操作; 以及从所述计算系统的调度配置中移除所述目标处理器核以防止对所述目标处理器核心的任务分配。 当目标处理器核心处于清除模式时，目标处理器核心维持在目标处理器核心不工作的在线空闲状态。

公开(公告)号：US10345887B2

公开(公告)日：2019-07-09

申请号：US15148031

申请日：2016-05-06

Applicant: MEDIATEK INC.

Inventor： Kuo-SU Hsiao ,  Yen-Lin Lee ,  Shih-Yen Chiu ,  Jia-Ming Chen ,  Mark Shane Peng ,  Ya-Ting Chang

IPC: G06F1/32 ,  G06F1/3287 ,  G06F1/324 ,  G06F1/329 ,  G06F1/3296 ,  G06F1/20 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/3234 ,  G06F1/3293

Abstract: Methods and apparatus are provided for adaptive optimization of low-power strategies. In one novel aspect, the device monitors one or more thermal-performance parameters and determines a plurality of operation scenarios for a plurality of corresponding low-power policies. Based on corresponding operation scenarios, the device selects corresponding low-power policy. The device applies different low-power strategy for temperature control based on low-power policies. Different low-power policy is applied to different low-power techniques, such as the DVFS, the CPU hot-plug, and the task migration. In another novel aspect, the device obtains one or more user-defined policy for each corresponding low-power technique. The selection of each low-power policy is further based on its corresponding user-defined policy. In one embodiment, the user-defined DVFS policy includes power policy, performance policy, and DVFS-balanced policy. The user-defined CPU hot-plug policy includes conservative policy, aggressive policy, and hot-plug-balanced policy. The user-defined task-migration policy includes performance policy, and task-migration-balanced policy.

公开(公告)号：US20170160962A1

公开(公告)日：2017-06-08

申请号：US15363181

申请日：2016-11-29

Applicant: MediaTek Inc.

Inventor： Shih-Yen Chiu ,  Wan-Ching Huang ,  Chung-Ho Chang ,  Ya-Ting Chang ,  Ming-Ju Wu ,  Nicholas Ching Hui Tang

IPC: G06F3/06

CPC classification number: G06F9/5077 ,  G06F9/455

Abstract: A multicore processor system includes multiple processor cores. When a processor core goes offline, the offline processor core is mapped to a mapped processor core, which is selected from an emulated processor core and one or more online processor cores among the multiple processor cores. The emulated processor core is a software construct containing an emulated state of the offline processor core. When the multicore processor system receives a system call that is sent from a requestor to the offline processor core to request for system information from the offline processor core, the system call is re-directed to the mapped processor core. The system information is returned from the mapped processor core to the requestor in response to the system call.