公开(公告)号：US20160314024A1

公开(公告)日：2016-10-27

申请号：US15098876

申请日：2016-04-14

Applicant: MediaTek Inc.

Inventor： Ya-Ting Chang ,  Ming-Ju Wu ,  Pi-Cheng Chen ,  Jia-Ming Chen ,  Chung-Ho Chang ,  Pi-Cheng Hsiao ,  Hung-Lin Chou ,  Shih-Yen Chiu

IPC: G06F9/50

CPC classification number: G06F9/5088 ,  G06F1/3203 ,  G06F1/3287 ,  G06F1/329 ,  G06F9/5022 ,  G06F9/5094 ,  Y02D10/171 ,  Y02D10/22 ,  Y02D10/24 ,  Y02D50/20

Abstract: A computing system supports a clearance mode for its processor cores. The computing system can transition a target processor core from an active mode into a clearance mode according to a system policy. The system policy determines the number of processor cores to be in the active mode. The transitioning into the clearance mode includes the operations of migrating work from the target processor core to one or more other processor cores in the active mode in the computing system; and removing the target processor core from a scheduling configuration of the computing system to prevent task assignment to the target processor core. When the target processor core is in the clearance mode, the target processor core is maintained in an online idle state in which the target processor core performs no work.

Abstract translation: 计算系统支持其处理器核心的清除模式。 计算系统可以根据系统策略将目标处理器核心从活动模式转换到清除模式。 系统策略确定处于活动模式的处理器核心数。 过渡到清除模式包括在计算系统中将工作从目标处理器核心迁移到活动模式中的一个或多个其他处理器核心的操作; 以及从所述计算系统的调度配置中移除所述目标处理器核以防止对所述目标处理器核心的任务分配。 当目标处理器核心处于清除模式时，目标处理器核心维持在目标处理器核心不工作的在线空闲状态。