公开(公告)号：US20250077180A1

公开(公告)日：2025-03-06

申请号：US18820312

申请日：2024-08-30

Applicant: MEDIATEK INC.

Inventor： Ming-Hung Lin ,  Ming-En Shih ,  Shih-Wei Hsieh ,  Ping-Yuan Tsai ,  You-Yu Nian ,  Pei-Kuei Tsung ,  Jen-Wei Liang ,  Shu-Hsin Chang ,  En-Jui Chang ,  Chih-Wei Chen ,  Po-Hua Huang ,  Chung-Lun Huang

IPC: G06F7/505 ,  G06F7/57

Abstract: A digital compute-in-memory (DCIM) macro includes a memory cell array and an arithmetic logic unit (ALU). The memory cell array stores weight data of a neural network. The ALU receives parallel bits of a same input channel in an activation input, and generates a convolution computation output of the parallel bits and target weight data in the memory cell array.

公开(公告)号：US20250077282A1

公开(公告)日：2025-03-06

申请号：US18820342

申请日：2024-08-30

Applicant: MEDIATEK INC.

Inventor： Ming-Hung Lin ,  Ming-En Shih ,  Shih-Wei Hsieh ,  Ping-Yuan Tsai ,  You-Yu Nian ,  Pei-Kuei Tsung ,  Jen-Wei Liang ,  Shu-Hsin Chang ,  En-Jui Chang ,  Chih-Wei Chen ,  Po-Hua Huang ,  Chung-Lun Huang

IPC: G06F9/50 ,  G06F17/15

Abstract: A digital compute-in-memory (DCIM) system includes a first DCIM macro. The first DCIM macro includes a first memory cell array and a first arithmetic logic unit (ALU). The first memory cell array has N rows that are configured to store weight data of a neural network in a single weight data download session, wherein N is a positive integer not smaller than two. The first ALU is configured to receive a first activation input, and perform convolution operations upon the first activation input and a single row of weight data selected from the N rows of the first memory cell array to generate first convolution outputs.