公开(公告)号：US20180261528A1

公开(公告)日：2018-09-13

申请号：US15863984

申请日：2018-01-08

Applicant: MEDIATEK INC.

Inventor： Tai-Yu Chen ,  Wen-Sung Hsu ,  Sheng-Liang Kuo ,  Chi-Wen Pan ,  Jen-Chuan Chen

IPC: H01L23/433 ,  H01L25/18 ,  H01L23/367

Abstract: A semiconductor package includes a package substrate having a top surface and a bottom surface, an interposer mounted on the top surface of the package substrate, a first semiconductor die and a second semiconductor die mounted on the interposer in a side-by-side manner, and a stiffener ring secured to the top surface of the package substrate. The stiffener ring encircles the first semiconductor die and the second semiconductor die. The stiffener ring comprises a reinforcement rib striding across the interposer.

公开(公告)号：US10573579B2

公开(公告)日：2020-02-25

申请号：US15863984

申请日：2018-01-08

Applicant: MEDIATEK INC.

Inventor： Tai-Yu Chen ,  Wen-Sung Hsu ,  Sheng-Liang Kuo ,  Chi-Wen Pan ,  Jen-Chuan Chen

IPC: H01L23/433 ,  H01L25/18 ,  H01L23/367 ,  H01L23/16 ,  H01L23/36 ,  H01L23/00 ,  H01L25/065 ,  H01L23/538 ,  H01L23/373 ,  H01L23/498

Abstract: A semiconductor package includes a package substrate having a top surface and a bottom surface, an interposer mounted on the top surface of the package substrate, a first semiconductor die and a second semiconductor die mounted on the interposer in a side-by-side manner, and a stiffener ring secured to the top surface of the package substrate. The stiffener ring encircles the first semiconductor die and the second semiconductor die. The stiffener ring comprises a reinforcement rib striding across the interposer.

公开(公告)号：US10978406B2

公开(公告)日：2021-04-13

申请号：US16007032

申请日：2018-06-13

Applicant: MEDIATEK INC.

Inventor： Hung-Jen Chang ,  Jen-Chuan Chen ,  Hsueh-Te Wang ,  Wen-Sung Hsu

IPC: H01L23/552 ,  H01L25/065 ,  H01L25/16 ,  H01L21/3205 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L21/285

Abstract: A semiconductor package structure including an encapsulating layer, a package substrate, and a conductive shielding layer is provided. The package substrate has a device region covered by the encapsulating layer and an edge region surrounding the device region and exposed from the encapsulating layer. The package substrate includes an insulating layer and a patterned conductive layer in a level of the insulating layer. The patterned conductive layer includes conductors in and along the edge region. The edge region is partially exposed from the conductors, as viewed from a top-view perspective. The conductive shielding layer covers and surrounds the encapsulating layer and is electrically connected to the conductors.