Abstract:
A CPU control method for controlling a first CPU and a second CPU The method comprises: (a) applying the first CPU to execute a first group of codes comprising at least one code if the first CPU is operating to perform a first function; and (c) applying the second CPU to execute a second group of codes comprising at least one code if the second CPU is operating to perform the first function. The first group of codes is optimized for the first CPU, the second group of codes is optimized for the second CPU and the first group of codes comprises at least one code different from the code for the second group of codes.
Abstract:
A CPU control method for controlling a first CPU and a second CPU The method comprises: (a) applying the first CPU to execute a first group of codes comprising at least one code if the first CPU is operating to perform a first function; and (c) applying the second CPU to execute a second group of codes comprising at least one code if the second CPU is operating to perform the first function. The first group of codes is optimized for the first CPU, the second group of codes is optimized for the second CPU and the first group of codes comprises at least one code different from the code for the second group of codes.
Abstract:
A technique, as well as select implementations thereof, pertaining to dynamic adjustment of speed of memory is described. The technique may involve obtaining information indicative of memory transactions associated with a memory device from an external memory interface coupled to the memory device. The technique may also involve determining a runtime bandwidth of the memory device according to the memory transactions. The technique may further involve comparing the runtime bandwidth of the memory device to at least one threshold bandwidth. The technique may additionally involve adjusting the speed of the memory device according to a result of the comparing.