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公开(公告)号：US10152295B2
公开(公告)日：2018-12-11
申请号：US15168483
申请日：2016-05-31
Applicant: MediaTek Inc.
Inventor： Chun-Hung Chen , Chien-Chou Ko , Chiung-Fu Chen , Yi-Cheng Chen
IPC: G06F3/14
Abstract: An electronic device and an associated method for displaying image data on a first display device of a first electronic device and a second display device of a second electronic device external of the first electronic device are provided. The method includes the steps of: determining whether image data to be displayed on the first and second display devices are the same; when the image data to be displayed on the first and second display devices are the same, estimating the first resource consumption required when the extension mode is selected for displaying the image data and the second resource consumption required when the mirror mode is selected for displaying the image data; and determining to display the image data on the first and second display devices in the extension mode or the mirror mode according to the first and second estimated resource consumption.
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公开(公告)号：US20200376375A1
公开(公告)日：2020-12-03
申请号：US16882764
申请日：2020-05-26
Applicant: MEDIATEK INC.
Inventor： Chiung-Fu Chen
IPC: A63F13/358 , A63F13/211 , A63F13/213
Abstract: A method and apparatus for performing client side latency enhancement with aid of cloud game server side image orientation control. The method may include: utilizing at least one orientation-related sensor in a client device to detect a client device orientation of the client device; utilizing a network interface circuit in the client device to notify a cloud game server of the client device orientation; utilizing the cloud game server to rotate video contents of a cloud game in advance for the client device according to the client device orientation to generate pre-rotated video contents, for being output to the client device through video streaming; and utilizing the network interface circuit to receive the pre-rotated video contents through the video streaming and buffering the pre-rotated video contents in a video buffer, for being output to a display panel and displayed on the display panel.
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公开(公告)号：US09807336B2
公开(公告)日：2017-10-31
申请号：US14931719
申请日：2015-11-03
Applicant: MediaTek Inc.
Inventor： Chun-Chuan Yang , Yi-Lun Lin , Chia-Mao Hung , Chiung-Fu Chen
IPC: H04N5/46 , H04N21/4363 , H04N21/4402 , H04N21/442 , H04N21/462 , H04N7/01 , G09G5/00
CPC classification number: H04N5/46 , G09G5/006 , G09G2340/0435 , G09G2370/10 , G09G2370/16 , H04N7/0127 , H04N21/43637 , H04N21/440281 , H04N21/44227 , H04N21/4621
Abstract: A technique, as well as select implementations thereof, pertaining to dynamic adjustment of video frame sampling rate is described. The technique may involve receiving a first video signal comprising a first plurality of video frames and determining a frame rate of the first plurality of video frames. The technique may also involve adjusting a sampling rate according to the determined frame rate of the first plurality of video frames. The technique may further involve sampling the first plurality of video frames at the adjusted sampling rate. The technique may additionally involve generating a second video signal comprising a second plurality of video frames based on the sampled first plurality of video frames.
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公开(公告)号：US20160057382A1
公开(公告)日：2016-02-25
申请号：US14931719
申请日：2015-11-03
Applicant: MediaTek Inc.
Inventor： Chun-Chuan Yang , Yi-Lun Lin , Chia-Mao Hung , Chiung-Fu Chen
CPC classification number: H04N5/46 , G09G5/006 , G09G2340/0435 , G09G2370/10 , G09G2370/16 , H04N7/0127 , H04N21/43637 , H04N21/440281 , H04N21/44227 , H04N21/4621
Abstract: A technique, as well as select implementations thereof, pertaining to dynamic adjustment of video frame sampling rate is described. The technique may involve receiving a first video signal comprising a first plurality of video frames and determining a frame rate of the first plurality of video frames. The technique may also involve adjusting a sampling rate according to the determined frame rate of the first plurality of video frames. The technique may further involve sampling the first plurality of video frames at the adjusted sampling rate. The technique may additionally involve generating a second video signal comprising a second plurality of video frames based on the sampled first plurality of video frames.
Abstract translation: 描述了与视频帧采样率的动态调整有关的技术及其选择实现。 该技术可以涉及接收包括第一多个视频帧的第一视频信号并且确定第一多个视频帧的帧速率。 该技术还可以涉及根据所确定的第一多个视频帧的帧速率来调整采样率。 该技术可以进一步涉及以调整的采样率对第一多个视频帧进行采样。 该技术可以另外包括基于所采样的第一多个视频帧生成包括第二多个视频帧的第二视频信号。
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公开(公告)号：US20200175644A1
公开(公告)日：2020-06-04
申请号：US16698977
申请日：2019-11-28
Applicant: MEDIATEK INC.
Inventor： Chiung-Fu Chen , Cheng-Che Chen
Abstract: A method and apparatus for generating a series of frames with aid of a synthesizer to offload graphics processing unit (GPU) rendering within an electronic device are provided. The method may include: utilizing a GPU to perform full-rendering to generate a first frame in a color buffer, for being output to a display panel and displayed on the display panel; utilizing the GPU to generate a set of metadata of at least one subsequent frame in a metadata buffer; and utilizing the synthesizer to synthesize said at least one subsequent frame according to previous frame information and the set of metadata of said at least one subsequent frame, to generate said at least one subsequent frame in the color buffer, for being output to the display panel and displayed on the display panel.
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Patent Agency Ranking
公开(公告)号：US20170308988A1
公开(公告)日：2017-10-26
申请号：US15134279
申请日：2016-04-20
Applicant: MediaTek Inc.
Inventor： Yen-Hsiang Li , Jih-Ming Hsu , Yen-Lin Lee , Chih-Yu Chang , Chiung-Fu Chen , Chih-Chung Cheng , Chung-Min Kao , Che-Ming Hsu
Abstract: A graphics accelerator device offloads the workload of a graphics processing unit (GPU) by performing image composition and other specialized functions. The graphics accelerator device includes a rasterization module to rasterize a set of primitives to a set of pixels and generate information of the set of pixels. The graphics accelerator device also includes intra-process module to retrieve pixel values from a memory according to the information received from the rasterization module, perform mathematical calculations on the pixel values, and generate one or more processed image layers. The graphics accelerator device further includes an inter-process module to composite the one or more processed image layers received from the intra-process module with other image layers retrieved from the memory, and output a composited image to a display.
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公开(公告)号：US20170287106A1
公开(公告)日：2017-10-05
申请号：US15630252
申请日：2017-06-22
Applicant: MediaTek Inc.
Inventor： Chang-Chu Liu , Jun-Jie Jiang , Chiung-Fu Chen , You-Min Yeh
CPC classification number: G06T1/60 , G06T1/20 , G06T11/00 , G06T11/60 , G06T2210/62
Abstract: A device generates blended frames, with each blended frame composed of multiple image layers and each image layer composed of multiple regions. The device includes display hardware. The display hardware retrieves a given image layer in a current frame from a memory. Based on at least content hints generated at the display hardware for the given image layer in the current frame, the display hardware makes a determination of whether to skip access to the memory for retrieving each region of each image layer in a next frame that is immediately after the current frame, and accesses the memory for the next frame according to the determination.
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公开(公告)号：US20230067568A1
公开(公告)日：2023-03-02
申请号：US17894947
申请日：2022-08-24
Applicant: MediaTek Inc.
Inventor： Yao-Sheng Wang , Pei-Kuei Tsung , Chiung-Fu Chen , Wai Mun Wong , Chao-Min Chang , Yu-Sheng Lin , Chiani Lu , Chih-Cheng Chen
Abstract: The quality of a frame sequence is enhanced by a booster engine collaborating with a first stage circuit. The first stage circuit adjusts the quality degradation of the frame sequence when a condition in constrained resources is detected. The quality degradation includes at least one of uneven resolution and uneven frame per second (FPS). The booster engine receives the frame sequence from the first stage circuit, and generates an enhanced frame sequence based on the frame sequence for transmission to a second stage circuit.
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公开(公告)号：US11200636B2
公开(公告)日：2021-12-14
申请号：US16698977
申请日：2019-11-28
Applicant: MEDIATEK INC.
Inventor： Chiung-Fu Chen , Cheng-Che Chen
Abstract: A method and apparatus for generating a series of frames with aid of a synthesizer to offload graphics processing unit (GPU) rendering within an electronic device are provided. The method may include: utilizing a GPU to perform full-rendering to generate a first frame in a color buffer, for being output to a display panel and displayed on the display panel; utilizing the GPU to generate a set of metadata of at least one subsequent frame in a metadata buffer; and utilizing the synthesizer to synthesize said at least one subsequent frame according to previous frame information and the set of metadata of said at least one subsequent frame, to generate said at least one subsequent frame in the color buffer, for being output to the display panel and displayed on the display panel.
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公开(公告)号：US10861421B2
公开(公告)日：2020-12-08
申请号：US16403491
申请日：2019-05-03
Applicant: MediaTek Inc.
Inventor： Chiung-Fu Chen , Kuo-Yi Wang , Cheng-Che Chen
Abstract: A stable frame rate is maintained by a system that includes a graphics processing unit (GPU). The system also includes memory to store frames rendered by the GPU, and a display to display the frames rendered by the GPU. In response to a negative indication with respect to the GPU maintaining a frame rate at an operating frequency, the GPU is operative to reduce frame quality of subsequent frames while maintaining the operating frequency.
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