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公开(公告)号:US12237871B2
公开(公告)日:2025-02-25
申请号:US18190931
申请日:2023-03-27
Applicant: Lightmatter, Inc.
Inventor: Mykhailo Tymchenko , Bradford Turcott , Robert Turner , Binoy Shah , Shashank Gupta , James Carr , Ajay Joshi , Nicholas C. Harris , Darius Bunandar
IPC: H04B10/50 , G02B6/124 , G02B6/13 , G02B6/42 , G02B6/43 , H04B10/079 , H04B10/40 , H04B10/70 , H04B10/80 , H04J14/02
Abstract: Photonic interposers that enable low-power, high-bandwidth inter-chip (e.g., board-level and/or rack-level) as well as intra-chip communication are described. Described herein are techniques, architectures and processes that improve upon the performance of conventional computers. Some embodiments provide photonic interposers that use photonic tiles, where each tile includes programmable photonic circuits that can be programmed based on the needs of a particular computer architecture. Some tiles are instantiations of a common template tile that are stitched together in a 1D or a 2D arrangement. Some embodiments described herein provide a programmable physical network designed to connect pairs of tiles together with photonic links.
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公开(公告)号:US20240248260A1
公开(公告)日:2024-07-25
申请号:US18417875
申请日:2024-01-19
Applicant: Lightmatter, Inc.
Inventor: Mihika Prabhu , Alexander Sludds , Aravind Kalaiah , Ajay Joshi , Bradford Turcott , Robert Turner , Nicholas C. Harris , Darius Bunandar
CPC classification number: G02B6/3546 , G02B6/29353 , G02B6/29355
Abstract: Provided herein are optical flow switches, and optical flow switch packages, implemented using photonic switches. The optical flow switch includes a network of photonic switches arranged between input and output ports of the optical flow switch. The network of photonic switches spans two or more reticles, and the two or more reticles may include photonic switching arrangements corresponding to repeated reticle masks or sets of reticle masks. The optical flow switch may be mounted to a glass substrate to form an optical flow switch package.
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公开(公告)号:US20240310593A1
公开(公告)日:2024-09-19
申请号:US18598048
申请日:2024-03-07
Applicant: Lightmatter, Inc.
Inventor: Robert Turner , Bradford Turcott , Darius Bunandar
CPC classification number: G02B6/4293 , G02B6/425 , G02B6/43
Abstract: Described herein are optical fiber shuffle circuits designed to programmably interconnect any number of ports without having to rely on thousands of optical fibers or more. The optical fiber shuffle circuits developed by the inventors and described herein can be built into photonic interposers. Photonic interposers of the types described herein include, for example, semiconductor substrates patterned (photolithographically) with photonic integrated circuits such as waveguides, modulators, photodetectors, switches, couplers, etc., or any combination thereof.
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公开(公告)号:US20240248950A1
公开(公告)日:2024-07-25
申请号:US18390329
申请日:2023-12-20
Applicant: Lightmatter, Inc.
Inventor: David Widemann , Bradford Turcott , Darius Bunandar , Nicholas C. Harris , Eric Hein , Alexandra Wleklinski
IPC: G06F17/14
CPC classification number: G06F17/142
Abstract: Hybrid analog-digital processors and related methods are described. A hybrid analog-digital processor or related method may carry out an algorithm for efficiently performing a Fourier Transform with lower power consumption and higher speed compared with fully-digital processors. A hybrid analog-digital processor or related method may use a digital processor to perform some portions of a Fourier Transform, such as sizing signals for input into an analog accelerator (such as a photonic accelerator). The analog accelerator may be configured to perform some portions of the Fourier Transform by performing matrix-vector multiplication on the sized signals using light. Further efficiency may be provided by in some environments by batching signals that are input into the analog accelerator into 2D arrays, or by performing matrix-vector multiplication using a submatrix of a full Fourier Transform matrix.
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公开(公告)号:US20230388024A1
公开(公告)日:2023-11-30
申请号:US18190931
申请日:2023-03-27
Applicant: Lightmatter, Inc.
Inventor: Mykhailo Tymchenko , Bradford Turcott , Robert Turner , Binoy Shah , Shashank Gupta , James Carr , Ajay Joshi , Nicholas C. Harris , Darius Bunandar
IPC: H04B10/80 , H04B10/40 , H04J14/02 , H04B10/079
CPC classification number: H04B10/803 , H04B10/808 , H04B10/40 , H04J14/0212 , H04B10/07953
Abstract: Photonic interposers that enable low-power, high-bandwidth inter-chip (e.g., board-level and/or rack-level) as well as intra-chip communication are described. Described herein are techniques, architectures and processes that improve upon the performance of conventional computers. Some embodiments provide photonic interposers that use photonic tiles, where each tile includes programmable photonic circuits that can be programmed based on the needs of a particular computer architecture. Some tiles are instantiations of a common template tile that are stitched together in a 1D or a 2D arrangement. Some embodiments described herein provide a programmable physical network designed to connect pairs of tiles together with photonic links.
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