Method for forming a planarized layer of a semiconductor device
    1.
    发明授权
    Method for forming a planarized layer of a semiconductor device 有权
    用于形成半导体器件的平坦化层的方法

    公开(公告)号:US07008755B2

    公开(公告)日:2006-03-07

    申请号:US10464645

    申请日:2003-06-19

    IPC分类号: G03F7/00 G03F7/36

    摘要: In a method for forming a planarized layer on a semiconductor device having concave and convex structures, a dielectric film is formed on a semiconductor substrate; a photoresist pattern is formed to have a thickness on a portion of the dielectric film other than a convex portion greater than h/n (h and n are real numbers of one or more) to remove the convex portion of the dielectric film by a depth of approximately h. The photoresist pattern is re-flowed to have a thickness below h/n at a portion from an edge of the convex portion to a slant portion of the dielectric film. The dielectric film is etched using an etchant having a selectivity of 1:n between the photoresist pattern and the dielectric film. An edge of the photoresist pattern is made thin by re-flowing thereby minimizing a pillar, hence allowing simple, fast, planarization of the dielectric film.

    摘要翻译: 在具有凹凸结构的半导体器件上形成平坦化层的方法中,在半导体衬底上形成电介质膜; 光致抗蚀剂图案形成为具有除了大于h / n(h和n为一个或多个的实数)的凸部以外的电介质膜的一部分上的厚度,以将电介质膜的凸部去除深度 大约h。 在从凸部的边缘到电介质膜的倾斜部分的部分,光致抗蚀剂图案被重新流动以具有低于h / n的厚度。 使用在光致抗蚀剂图案和电介质膜之间具有1:n选择性的蚀刻剂来蚀刻电介质膜。 通过再流动使光致抗蚀剂图案的边缘变薄,从而使柱最小化,从而允许简单,快速地平坦化介电膜。

    Phase-change semiconductor device and methods of manufacturing the same
    3.
    发明申请
    Phase-change semiconductor device and methods of manufacturing the same 有权
    相变半导体器件及其制造方法

    公开(公告)号:US20070012906A1

    公开(公告)日:2007-01-18

    申请号:US11482760

    申请日:2006-07-10

    IPC分类号: H01L29/04

    摘要: In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer on the metal layer pattern, a sidewall of the opening and the exposed portion of the substrate, the etch stop layer formed with a thickness less than an upper thickness threshold, and reducing at least a portion of the etch stop layer, the reduced portion of the etch stop layer forming an electrical connection with the substrate.

    摘要翻译: 在相变半导体器件及其制造方法中,示例性方法可以包括在衬底上形成金属层图案,金属层图案包括露出衬底的一部分的开口,在其上形成蚀刻停止层 金属层图案,开口的侧壁和衬底的暴露部分,蚀刻停止层形成为具有小于上部厚度阈值的厚度,以及减少至少一部分蚀刻停止层,蚀刻部分的蚀刻 停止层与基底形成电连接。

    Phase-change semiconductor device and methods of manufacturing the same
    4.
    发明授权
    Phase-change semiconductor device and methods of manufacturing the same 有权
    相变半导体器件及其制造方法

    公开(公告)号:US08053751B2

    公开(公告)日:2011-11-08

    申请号:US12591531

    申请日:2009-11-23

    IPC分类号: H01L21/4763

    摘要: In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer on the metal layer pattern, a sidewall of the opening and the exposed portion of the substrate, the etch stop layer formed with a thickness less than an upper thickness threshold, and reducing at least a portion of the etch stop layer, the reduced portion of the etch stop layer forming an electrical connection with the substrate.

    摘要翻译: 在相变半导体器件及其制造方法中,示例性方法可以包括在衬底上形成金属层图案,金属层图案包括露出衬底的一部分的开口,在其上形成蚀刻停止层 金属层图案,开口的侧壁和衬底的暴露部分,蚀刻停止层形成为具有小于上部厚度阈值的厚度,以及减少至少一部分蚀刻停止层,蚀刻部分的蚀刻 停止层与基底形成电连接。

    Phase-change semiconductor device and methods of manufacturing the same
    5.
    发明申请
    Phase-change semiconductor device and methods of manufacturing the same 有权
    相变半导体器件及其制造方法

    公开(公告)号:US20100072446A1

    公开(公告)日:2010-03-25

    申请号:US12591531

    申请日:2009-11-23

    IPC分类号: H01L45/00 H01L21/768

    摘要: In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer on the metal layer pattern, a sidewall of the opening and the exposed portion of the substrate, the etch stop layer formed with a thickness less than an upper thickness threshold, and reducing at least a portion of the etch stop layer, the reduced portion of the etch stop layer forming an electrical connection with the substrate.

    摘要翻译: 在相变半导体器件及其制造方法中,示例性方法可以包括在衬底上形成金属层图案,金属层图案包括露出衬底的一部分的开口,在其上形成蚀刻停止层 金属层图案,开口的侧壁和衬底的暴露部分,蚀刻停止层形成为具有小于上部厚度阈值的厚度,以及减少至少一部分蚀刻停止层,蚀刻部分的蚀刻 停止层与基底形成电连接。

    Method of cleaning semiconductor substrate
    7.
    发明授权
    Method of cleaning semiconductor substrate 失效
    半导体衬底的清洗方法

    公开(公告)号:US07318870B2

    公开(公告)日:2008-01-15

    申请号:US10421740

    申请日:2003-04-24

    IPC分类号: B08B7/00

    CPC分类号: H01L21/02065 B08B7/00

    摘要: A cleaning method for a semiconductor substrate including placing the semiconductor substrate into a cleaning chamber and injecting ozone gas (O3) into the cleaning chamber. This process operates to cleanse the semiconductor substrate without corrosion or etching of the semiconductor substrate; even when the substrate has metal layer made of tungsten.

    摘要翻译: 一种用于半导体衬底的清洁方法,包括将半导体衬底放置在清洁室中并将臭氧气体(O 3 3)注入到清洁室中。 该过程用于清洁半导体衬底而不会腐蚀或蚀刻半导体衬底; 即使当基板具有由钨制成的金属层时。