TASK ASSIGNMENT METHOD, COMPUTER PROGRAM PRODUCT AND TASK ASSIGNMENT SYSTEM
    1.
    发明申请
    TASK ASSIGNMENT METHOD, COMPUTER PROGRAM PRODUCT AND TASK ASSIGNMENT SYSTEM 审中-公开
    任务分配方法,计算机程序产品和任务分配系统

    公开(公告)号:US20160247105A1

    公开(公告)日:2016-08-25

    申请号:US15030410

    申请日:2014-10-24

    CPC classification number: G06Q10/06311 H04M15/8033 H04W4/023 H04W4/029

    Abstract: Disclosed is a computer-implemented method (1) of assigning a task to a mobile communication device (212, 222) belonging to a pool (210, 220) of mobile communication devices, wherein each mobile communications device is associated with a trusted owner and is locatable by means of location information, the method comprising generating (10) a task to be performed; generating a set of task locations at which the task can be performed; receiving (20) location information for said mobile communications devices; deriving (30) a location for each mobile communications device from said location information; using the derived location to calculate (40) a cost score for each mobile communication device, said cost score indicating the cost of the trusted owner of said mobile communication device to reach a target location; and assigning (60) the task to a selected location in said set and to one of said mobile communications devices, wherein the task is assigned to the one of said mobile communications devices based on the calculated cost scores. A computer program product including program code for executing this method on a computer processor and a system adapted to execute this method are also disclosed.

    Abstract translation: 公开了一种计算机实现的方法(1),其将任务分配给属于移动通信设备的池(210,220)的移动通信设备(212,222),其中每个移动通信设备与可信赖的所有者相关联, 可以通过位置信息来定位,所述方法包括生成(10)要执行的任务; 生成可以执行任务的一组任务位置; 接收(20)所述移动通信设备的位置信息; 从所述位置信息导出(30)每个移动通信设备的位置; 使用导出的位置来计算(40)每个移动通信设备的成本分数,所述成本分数指示所述移动通信设备的信任所有者到达目标位置的成本; 以及将所述任务分配(60)到所述集合中的选定位置和所述移动通信设备中的一个,其中基于所计算的成本分数将所述任务分配给所述移动通信设备中的一个。 还公开了一种包括用于在计算机处理器上执行该方法的程序代码和适于执行该方法的系统的计算机程序产品。

    A COMPUTING DEVICE FOR ITERATIVE APPILCATION OF TABLE NETWORKS

    公开(公告)号:US20160306973A1

    公开(公告)日:2016-10-20

    申请号:US15100647

    申请日:2014-11-19

    Abstract: A computing device (500) comprising an electronic storage (510) and an electronic processor (550) coupled to the storage, the storage storing a series of table networks (110, T1, T2), the processor being configured to compute an iterated function on a global data-input (121, w0) and a global state-input (121, s0) by applying table networks of the series of table networks, —a table network (112, 114, Ti) of the series being configured for a corresponding data-function (ƒi) and state-function (gi) and is configured to map a data-input (121, 122, si) to a data-output (122, 123, wi) according to the corresponding data-function (ƒi), and to simultaneously map a state-input (121, 122, si-1) to a state-output (122, 123, si) according to a state-function (gi), —the electronic processor being configured to iterate applying the series of table networks (T1, T2, T1, T2), a table network (T1) of the iteratively applied table networks to the global data-input (w0) and global state-input (s0), and a successive table network (T2, T1, T2) of said iteration to the data-output and state-output of a preceding table network of the series, the iterated application of the series determines a global data function (ƒ=ƒ2∘ƒ1∘ƒ2∘ƒ1) on the global data-input and determines a global state function (g=g2∘g1∘g2∘g1) on the global state-input, thus obtaining an intermediate data-output (winter=f(w0)) and an intermediate state-output (sinter=g(s0)), —the electronic storage is further storing a protecting table network (150) configured to cooperate with the series of table networks for countering modifications made to table networks of the series, the protecting table network being configured to receive as input: the intermediate state-output (126, sinter), and a global state-input (131, s0), the protecting table network being configured to verify that the global state-function (g) applied to the global state-input (s0) produces the intermediate state-output (sinter=g(s0)?).

    COMPUTER PROCESSOR AND SYSTEM WITHOUT AN ARITHMETIC AND LOGIC UNIT
    4.
    发明申请
    COMPUTER PROCESSOR AND SYSTEM WITHOUT AN ARITHMETIC AND LOGIC UNIT 审中-公开
    没有算术和逻辑单元的计算机处理器和系统

    公开(公告)号:US20150324199A1

    公开(公告)日:2015-11-12

    申请号:US14410127

    申请日:2013-07-06

    Abstract: A computer system comprising a processor and a memory, the processor comprising an instruction cycle circuit configured to repeatedly obtain a next instruction of a computer program, an instruction decoder configured to decode and execute the instruction obtained by the instruction cycle circuit, the computer system supporting multiple arithmetic and/or logic operations under control of one or more of the instructions, wherein the memory stores multiple tables, each specific one of the multiple arithmetic and/or logic operations being supported by a specific table stored in the memory, each specific table comprising the result of the specific arithmetic operations for a range of inputs.

    Abstract translation: 一种包括处理器和存储器的计算机系统,所述处理器包括指令周期电路,其被配置为重复获得计算机程序的下一指令,指令解码器,被配置为解码并执行由所述指令周期电路获得的指令,所述计算机系统支持 在一个或多个指令的控制下的多个算术和/或逻辑操作,其中存储器存储多个表,多个算术和/或逻辑运算中的每个特定的一个由存储在存储器中的特定表支持,每个特定表 包括一系列输入的具体算术运算结果。

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