Abstract:
A method to collect data and train, validate and deploy statistical models to predict overlay errors using patterned wafer geometry data and other relevant information includes selecting a training wafer set, measuring at multiple lithography steps and calculating geometry differences, applying a plurality of predictive models to the training wafer geometry differences and comparing predicted overlay to the measured overlay on the training wafer set. The most accurate predictive model is identified and the results fed-forward to the lithography scanner tool which can correct for these effects and reduce overlay errors during the wafer scan-and-expose processes.
Abstract:
A high-dimensional variable selection unit determines a list of critical parameters from sensor data and parametric tool measurements from a semiconductor manufacturing tool, such as a semiconductor inspection tool or other types of semiconductor manufacturing tools. The high-dimensional variable selection model can be, for example, elastic net, forward-stagewise regression, or least angle regression. The list of critical parameters may be used to design a next generation semiconductor manufacturing tool, to bring the semiconductor manufacturing tool back to a normal status, to match a semiconductor manufacturing tool's results with that of another semiconductor manufacturing tool, or to develop a specification for the semiconductor manufacturing tool.
Abstract:
A method to collect data and train, validate and deploy statistical models to predict overlay errors using patterned wafer geometry data and other relevant information includes selecting a training wafer set, measuring at multiple lithography steps and calculating geometry differences, applying a plurality of predictive models to the training wafer geometry differences and comparing predicted overlay to the measured overlay on the training wafer set. The most accurate predictive model is identified and the results fed-forward to the lithography scanner tool which can correct for these effects and reduce overlay errors during the wafer scan-and-expose processes.
Abstract:
A high-dimensional variable selection unit determines a list of critical parameters from sensor data and parametric tool measurements from a semiconductor manufacturing tool, such as a semiconductor inspection tool or other types of semiconductor manufacturing tools. The high-dimensional variable selection model can be, for example, elastic net, forward-stagewise regression, or least angle regression. The list of critical parameters may be used to design a next generation semiconductor manufacturing tool, to bring the semiconductor manufacturing tool back to a normal status, to match a semiconductor manufacturing tool's results with that of another semiconductor manufacturing tool, or to develop a specification for the semiconductor manufacturing tool.
Abstract:
A method to collect data and train, validate and deploy statistical models to predict overlay errors using patterned wafer geometry data and other relevant information includes selecting a training wafer set, measuring at multiple lithography steps and calculating geometry differences, applying a plurality of predictive models to the training wafer geometry differences and comparing predicted overlay to the measured overlay on the training wafer set. The most accurate predictive model is identified and the results fed-forward to the lithography scanner tool which can correct for these effects and reduce overlay errors during the wafer scan-and-expose processes.