TIME SYNCHRONIZATION FOR ENCRYPTED TRAFFIC IN A COMPUTER NETWORK

    公开(公告)号:US20210194612A1

    公开(公告)日:2021-06-24

    申请号:US16723548

    申请日:2019-12-20

    Abstract: In general, various aspects of the techniques described in this disclosure provide time synchronization for encrypted traffic in a computer network. In one example, the disclosure describes an apparatus, such as a network device, having a control unit for a network device in a computerized network having a topology of network devices; and a forwarding unit operative to determine a release time for sending a synchronization packet in accordance with a time synchronization protocol; modify the synchronization packet to include a release timestamp specifying the release time; sending a time value via sideband data associated with the synchronization packet, wherein the time value is based on the release time specified by the release timestamp; and schedule transmission of the synchronization packet for a time corresponding to the time value in the sideband data, the synchronization packet to be transmitted to a destination network device.

    Time synchronization for encrypted traffic in a computer network

    公开(公告)号:US11165527B2

    公开(公告)日:2021-11-02

    申请号:US16723548

    申请日:2019-12-20

    Abstract: In general, various aspects of the techniques described in this disclosure provide time synchronization for encrypted traffic in a computer network. In one example, the disclosure describes an apparatus, such as a network device, having a control unit for a network device in a computerized network having a topology of network devices; and a forwarding unit operative to determine a release time for sending a synchronization packet in accordance with a time synchronization protocol; modify the synchronization packet to include a release timestamp specifying the release time; sending a time value via sideband data associated with the synchronization packet, wherein the time value is based on the release time specified by the release timestamp; and schedule transmission of the synchronization packet for a time corresponding to the time value in the sideband data, the synchronization packet to be transmitted to a destination network device.

    Estimating bit error rate
    3.
    发明授权
    Estimating bit error rate 有权
    估计误码率

    公开(公告)号:US09483340B1

    公开(公告)日:2016-11-01

    申请号:US14849116

    申请日:2015-09-09

    Abstract: A system may obtain a current bit error count that identifies a quantity of bit errors in a bit stream during a time interval. The system may determine that the current bit error count identifies one or more bit errors. The system may determine whether an estimated bit error rate (BER) for the bit stream is likely to satisfy a threshold. The system may select an approach for determining the estimated BER for the bit stream. The estimated BER may be determined based on combining the current bit error count with a quantity of bits received in the time interval when the estimated BER is likely to exceed the threshold, and the estimated BER may be determined based on the current bit error count and one or more past bit error counts when the estimated BER is unlikely to exceed the threshold. The system may determine the estimated BER.

    Abstract translation: 系统可以获得在时间间隔期间识别比特流中的比特错误量的当前比特错误计数。 系统可以确定当前位错误计数识别一个或多个位错误。 系统可以确定比特流的估计误码率(BER)是否可能满足阈值。 系统可以选择用于确定比特流的估计BER的方法。 估计的BER可以基于将当前比特误差计数与估计的BER可能超过阈值的时间间隔中接收的比特数量进行组合来确定,并且可以基于当前比特误差计数确定估计的BER, 当估计的BER不太可能超过阈值时,一个或多个过去的位错误计数。 系统可以确定估计的BER。

    Methods and apparatus for implementing optical integrated routing with traffic protection
    4.
    发明授权
    Methods and apparatus for implementing optical integrated routing with traffic protection 有权
    实现具有流量保护的光学集成路由的方法和装置

    公开(公告)号:US09425893B1

    公开(公告)日:2016-08-23

    申请号:US13956094

    申请日:2013-07-31

    CPC classification number: H04B10/032 H04L1/00 H04Q11/0005 H04Q2011/0043

    Abstract: In some embodiments, an apparatus includes a switch device that can be operatively coupled to a network having a set of links. The switch device can receive at a first time, a message having a set of physical coding sublayer (PCS) lanes. The message can include an error notification within a first subset of PCS lanes from the set of PCS lanes and not within a second subset of PCS lanes from the set of PCS lanes. The error notification is associated with signal degradation of a link from the set of links, where the switch device can send a first signal in response to receiving the message at the first time. The switch device can also receive at a second time a message without the error notification, and the switch device can send a second signal in response to receiving the message at the second time.

    Abstract translation: 在一些实施例中,装置包括可操作地耦合到具有一组链路的网络的交换设备。 交换设备可以在第一时间接收具有一组物理编码子层(PCS)车道的消息。 该消息可以包括来自该PCS车道组的PCS车道的第一子集内的错误通知,并且不包括来自PCS车道组的PCS车道的第二子集内的错误通知。 错误通知与来自该组链路的链路的信号劣化相关联,其中交换设备可以响应于在第一时间接收到消息而发送第一信号。 交换设备还可以在第二时间接收到没有错误通知的消息,并且交换设备可以响应于在第二时间接收到该消息来发送第二信号。

    Estimating bit error rate
    7.
    发明授权

    公开(公告)号:US10296406B2

    公开(公告)日:2019-05-21

    申请号:US15339009

    申请日:2016-10-31

    Abstract: A system may obtain a current bit error count that identifies a quantity of bit errors in a bit stream during a time interval. The system may determine that the current bit error count identifies one or more bit errors. The system may determine whether an estimated bit error rate (BER) for the bit stream is likely to satisfy a threshold. The system may select an approach for determining the estimated BER for the bit stream. The estimated BER may be determined based on combining the current bit error count with a quantity of bits received in the time interval when the estimated BER is likely to exceed the threshold, and the estimated BER may be determined based on the current bit error count and one or more past bit error counts when the estimated BER is unlikely to exceed the threshold. The system may determine the estimated BER.

    System and method for customized port configuration

    公开(公告)号:US09847911B1

    公开(公告)日:2017-12-19

    申请号:US14741441

    申请日:2015-06-16

    CPC classification number: H04L41/0886 H04L41/0816 H04L41/0869

    Abstract: The disclosed system may include (1) a modular port concentrator that connects as a modular line card within a router to forward network packets, (2) a profile module, stored in memory, that stores an allowed port configuration profile that defines supported port configurations for the modular port concentrator, (3) a configuration module, stored in memory, that receives an attempted port configuration for the modular line card, (4) an enforcement module, stored in memory, that enforces the allowed port configuration profile by taking remedial action in response to determining that the allowed port configuration profile does not allow the attempted port configuration, and (5) at least one physical processor configured to execute the modular port concentrator, the profile module, the configuration module, and the enforcement module. Various other systems and methods are also disclosed.

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