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    ISOCYANURATE COMPOUND FOR FORMING ORGANIC ANTI-REFLECTIVE LAYER AND COMPOSITION INCLUDING SAME
    7.
    发明申请
    ISOCYANURATE COMPOUND FOR FORMING ORGANIC ANTI-REFLECTIVE LAYER AND COMPOSITION INCLUDING SAME 有权
    用于形成有机抗反射层的异氰酸酯化合物和包括其的组合物

    公开(公告)号：US20120164338A1

    公开(公告)日：2012-06-28

    申请号：US13393682

    申请日：2010-09-14

    申请人： Hyo-Jung Roh ,  Dong-Kyu Ju ,  Hyun-Jin Kim ,  Deog-Bae Kim

    发明人： Hyo-Jung Roh ,  Dong-Kyu Ju ,  Hyun-Jin Kim ,  Deog-Bae Kim

    IPC分类号： C09D179/00 ,  B05D3/00 ,  C07D251/34

    CPC分类号： G03F7/091 ,  B05D3/02 ,  C07D251/06 ,  C08F283/00 ,  C08G75/00 ,  C08K5/0025 ,  C08K5/42 ,  C09D5/006 ,  G03F7/168 ,  H01L21/0201 ,  H01L21/0271 ,  H01L21/4757 ,  H01L31/02168 ,  H01L2924/0705 ,  H01L2924/364 ,  C08L81/00

    摘要： An isocyanurate compound for forming an organic anti-reflective coating layer, which has superior stability and etch rate at a high temperature, and which has a high refractive index, is represented by following Formula 1. In Formula 1, R is independently a hydrogen atom or a methyl group, R1 is independently a chain type or ring type saturated or unsaturated hydrocarbyl group of 1 to 15 carbon atoms containing 0 to 6 of hetero atoms, and R2 independently a chain type or ring type saturated or unsaturated hydrocarbyl group of 1 to 15 carbon atoms containing 0 to 15 of hetero atoms, wherein, R1 can have at least two bonding parts, and in the case that R1 has at least two bonding parts, the rest parts except R1 of the compounds represented by Formula 1 can connect to the R1 to form a polymer structure.

    摘要翻译： 用于形成有机抗反射涂层的异氰脲酸酯化合物，其在高温下具有优异的稳定性和蚀刻速率，并且具有高折射率，由下式1表示。在式1中，R独立地为氢原子 或甲基，R 1独立地为含有0〜6个杂原子的1〜15个碳原子的链型或环型饱和或不饱和烃基，R2独立地为1〜1的链型或环型饱和或不饱和烃基 含有0〜15个杂原子的15个碳原子，其中，R1可以具有至少两个键合部分，并且在R1具有至少两个键合部分的情况下，由式1表示的化合物除了R1之外的其余部分可以连接到 R1形成聚合物结构。

    Semiconductor memory device and access method thereof
    9.
    发明授权
    Semiconductor memory device and access method thereof 有权
    半导体存储器件及其访问方法

    公开(公告)号：US08125847B2

    公开(公告)日：2012-02-28

    申请号：US12385121

    申请日：2009-03-31

    申请人： Dae-Hyun Kim ,  Kwang-il Park ,  Kyoung-Ho Kim ,  Hyun-Jin Kim ,  Hye-Ran Kim

    发明人： Dae-Hyun Kim ,  Kwang-il Park ,  Kyoung-Ho Kim ,  Hyun-Jin Kim ,  Hye-Ran Kim

    IPC分类号： G11C8/00 ,  G11C8/18

    CPC分类号： G11C8/18 ,  G11C7/08 ,  G11C8/12 ,  G11C11/4076 ,  G11C11/4091

    摘要： Example embodiments provide a semiconductor memory device that may include: a cell array arranged in pluralities of rows and columns; and a sense amplifier conducting writing and reading operations to the cell array in response to writing and reading commands in correspondence with an access time, which may be variable in period. The sense amplifier adjusts pulse widths of write-in and read-out data in accordance with a period of the access time.

    摘要翻译： 示例性实施例提供半导体存储器件，其可以包括：布置成多行和列的单元阵列; 以及响应于写入和读取对应于在周期可变的访问时间的访问时间，对单元阵列执行写入和读取操作的读出放大器。 读出放大器根据访问时间的周期来调整写入和读出数据的脉冲宽度。

    Latency signal generator and method thereof
    10.
    发明申请
    Latency signal generator and method thereof 审中-公开
    延迟信号发生器及其方法

    公开(公告)号：US20110208988A1

    公开(公告)日：2011-08-25

    申请号：US13064961

    申请日：2011-04-28

    申请人： Hyun-Jin Kim ,  Ho-young Song ,  Seong-Jin Jang ,  Youn-sik Park

    发明人： Hyun-Jin Kim ,  Ho-young Song ,  Seong-Jin Jang ,  Youn-sik Park

    IPC分类号： G06F1/04

    CPC分类号： G11C7/22 ,  G11C7/222

    摘要： A latency signal generator and method thereof are provided. The example latency signal generator may include a sampling clock signal generator adjusting a plurality of initial sampling clock signals based on a received clock signal to generate a plurality of adjusted sampling clock signals, a latch enable signal supply unit adjusting a plurality of initial latch enable signals based on a given one of the plurality of initial sampling clock signals to generate a plurality of adjusted latch enable signals and a latch unit including a plurality of latency latches, each of the plurality of latency latches selectively latching a given internal read command based on one of the plurality of adjusted sampling clock signals and one of the plurality of adjusted latch enable signals.

    摘要翻译： 提供了一种等待时间信号发生器及其方法。 示例性延迟信号发生器可以包括采样时钟信号发生器，其基于所接收的时钟信号来调整多个初始采样时钟信号，以产生多个经调整的采样时钟信号;锁存使能信号供应单元，调整多个初始锁存使能信号 基于所述多个初始采样时钟信号中的给定一个以产生多个调整的锁存使能信号，以及包括多个延迟锁存器的锁存单元，所述多个延迟锁存器中的每一个基于一个等待锁存器选择性地锁存给定的内部读取命令 多个经调整的采样时钟信号中的一个和多个调整的锁存使能信号中的一个。