公开(公告)号：US20100096609A1

公开(公告)日：2010-04-22

申请号：US12493672

申请日：2009-06-29

Applicant: Jin Hyock KIM ,  Kee Jeung LEE ,  Deok Sin KIL

Inventor： Jin Hyock KIM ,  Kee Jeung LEE ,  Deok Sin KIL

IPC: H01L47/00 ,  H01L21/00

CPC classification number: H01L45/143 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1616 ,  H01L45/1641

Abstract: A phase change memory device that has a layered phase change layer composed of multiple phase change materials is presented. The device includes a semiconductor substrate, an interlayer dielectric layer, a high-temperature crystallization phase change, a low-temperature crystallization phase change layer, and an upper electrode. The interlayer dielectric layer formed on the semiconductor substrate and the high-temperature crystallization phase change layer is formed on the interlayer dielectric layer. The low-temperature crystallization phase change layer is formed over the high-temperature crystallization phase change layer. The upper electrode is formed over the low-temperature crystallization phase change layer. An optional diffusion barrier may be interposed between the two phase change layers.

Abstract translation: 提出了具有由多个相变材料构成的分层相变层的相变存储器件。 该器件包括半导体衬底，层间介电层，高温结晶相变，低温结晶相变层和上电极。 形成在半导体衬底上的层间电介质层和高温结晶相变层形成在层间电介质层上。 在高温结晶相变层上形成低温结晶相变层。 上电极形成在低温结晶相变层上。 可以在两个相变层之间插入可选的扩散阻挡层。

公开(公告)号：US20110143477A1

公开(公告)日：2011-06-16

申请号：US12834141

申请日：2010-07-12

Applicant: Jang Uk LEE ,  Kang Sik CHOI ,  Hae Chan PARK ,  Jin Hyock KIM ,  Ja Chun KU

Inventor： Jang Uk LEE ,  Kang Sik CHOI ,  Hae Chan PARK ,  Jin Hyock KIM ,  Ja Chun KU

IPC: H01L21/28

CPC classification number: H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1683

Abstract: A method of manufacturing a phase change memory device is provided. A first insulating layer having a plurality of metal word lines spaced apart at a constant distance is formed on a semiconductor substrate. A plurality of line structures having a barrier metal layer, a polysilicon layer and a hard mask layer are formed to be overlaid on the plurality of metal word lines. A second insulating layer is formed between the line structures. Cross patterns are formed by etching the hard mask layers and the polysilicon layers of the line structures using mask patterns crossed with the metal word lines. A third insulating layer is buried within spaces between the cross patterns. Self-aligned phase change contact holes are formed and at the same time, diode patterns formed of remnant polysilicon layers are formed by selectively removing the hard mask layers constituting the cross patterns.

Abstract translation: 提供一种制造相变存储器件的方法。 在半导体衬底上形成具有以恒定距离隔开的多个金属字线的第一绝缘层。 形成具有阻挡金属层，多晶硅层和硬掩模层的多个线结构以覆盖在多个金属字线上。 在线路结构之间形成第二绝缘层。 通过使用与金属字线交叉的掩模图案蚀刻线结构的硬掩模层和多晶硅层来形成交叉图案。 第三绝缘层埋在交叉图案之间的空间内。 形成自对准的相变接触孔，同时，通过选择性地去除构成交叉图案的硬掩模层，形成由剩余多晶硅层形成的二极管图案。

公开(公告)号：US20130126815A1

公开(公告)日：2013-05-23

申请号：US13599489

申请日：2012-08-30

Applicant: Jin Hyock KIM ,  Keun Lee ,  Young Seok Kwon

Inventor： Jin Hyock KIM ,  Keun Lee ,  Young Seok Kwon

IPC: H01L45/00

CPC classification number: H01L27/2409 ,  H01L29/47 ,  H01L29/872 ,  H01L45/06 ,  H01L45/145 ,  H01L45/1633

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a semiconductor substrate in which a word line region is formed, and a barrier metal layer arranged on the word line region and causing a Schottky junction. The barrier metal layer includes a first nitride material, in which a first material is nitrified, and a second nitride material, in which a second material is nitrified. The barrier metal layer is formed of a mixture of the first nitride material and the second nitride material. At least one of the first material or the second material is rich in a metal used to form the first nitride material or the second nitride material.