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公开(公告)号：US07034955B2
公开(公告)日：2006-04-25
申请号：US09998828
申请日：2001-12-03
申请人： James Glenn Bearss , Judd E. Heape
发明人： James Glenn Bearss , Judd E. Heape
CPC分类号： G06K15/00 , G06K15/1856 , G06K2215/0002 , G06K2215/0025
摘要： The processor enhanced memory module PEMM can be incorporated into the hardcopy image processing pipeline of existing printer controllers by using the smart memory model. Here the data generated from RISC based PDL interpretation or pre-rasterized data can be processed in an accelerated fashion into page bit maps, color space converted, and compressed by the PEMM. Since the DSP on the PEMM is programmable, the resolution, color space, and type of compression along with other printer specific processing can have formats other than those determined by the fixed functionality of the ASIC devices present in the pipeline.
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公开(公告)号：US06185704B2
公开(公告)日：2001-02-06
申请号：US09058000
申请日：1998-04-09
申请人： Basavaraj I. Pawate , Matthew A. Woolsey , Douglas L. Mahlum , Fred J. Reuter , Yoshihide Iwata , Judd E. Heape
发明人： Basavaraj I. Pawate , Matthew A. Woolsey , Douglas L. Mahlum , Fred J. Reuter , Yoshihide Iwata , Judd E. Heape
IPC分类号： G11C2900
CPC分类号： G06F12/0684 , G11C5/04
摘要： A computer system includes a main processing unit (12) coupled to a DSP/memory module (40). The DSP/memory module (40) includes semiconductor memory (42) and digital signal processor circuitry (44) including one or more digital signal processors (56). The DSP/memory module (40) may be placed in standard main memory sockets, such as a SIMM or DIMM sockets, and used as conventional main memory. The memory module can also be used in a smart mode, wherein the digital signal processor (56) performs operations on data for retrieval by the main processing unit (12).
摘要翻译： 计算机系统包括耦合到DSP /存储器模块（40）的主处理单元（12）。 DSP /存储器模块（40）包括半导体存储器（42）和包括一个或多个数字信号处理器（56）的数字信号处理器电路（44）。 DSP /存储器模块（40）可以被放置在诸如SIMM或DIMM插槽的标准主存储器插槽中，并且被用作传统的主存储器。 存储器模块也可以以智能模式使用，其中数字信号处理器（56）对由主处理单元（12）检索的数据执行操作。
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3.发明授权Automatic detection and correction of relatively rearranged and/or inverted data and address signals to shared memory 有权将相对重新排列和/或反相的数据和地址信号自动检测和校正到共享存储器公开(公告)号：US06701418B2
公开(公告)日：2004-03-02
申请号：US09998331
申请日：2001-12-03
IPC分类号： G06F1300
CPC分类号： G06F7/768 , G06F11/221
摘要： A set of related methods for detecting the existence and exact nature of any rearrangements and/or inversions of address lines and/or data lines to a memory device, relative to a second set of address lines and/or data lines to the same memory, are disclosed. Moreover, a set of related methods for correcting these relative rearrangements and/or inversions are disclosed. These methods allow meaningful access to memory shared by two or more devices using different address and data paths in the case where the relative nature of the address and data paths is unknown a priori. These methods of detecting and correcting such mismatches in separate address and data lines to shared memory may be implemented either in hardware or software or a combination of both.
摘要翻译： 一组相关方法，用于检测相对于第二组地址线和/或数据线到同一存储器的地址线和/或数据线到存储器件的任何重排和/或倒转的存在和确切性质， 被披露。 此外，公开了一组用于校正这些相对重排和/或反转的相关方法。 在地址和数据路径的相对性质先天未知的情况下，这些方法允许有意义地访问由两个或多个设备共享的存储器，使用不同的地址和数据路径。 在单独的地址和数据线中检测和校正这种不匹配的共享存储器的这些方法可以以硬件或软件或两者的组合来实现。
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公开(公告)号：US06584588B1
公开(公告)日：2003-06-24
申请号：US09698089
申请日：2000-10-30
申请人： Basavaraj I. Pawate , Matthew A. Woolsey , Douglas L. Mahlum , Fred J. Reuter , Yoshihide Iwata , Judd E. Heape
发明人： Basavaraj I. Pawate , Matthew A. Woolsey , Douglas L. Mahlum , Fred J. Reuter , Yoshihide Iwata , Judd E. Heape
IPC分类号： G11C2900
CPC分类号： G06F12/0684 , G11C5/04
摘要： A computer system includes a main processing unit (12) coupled to a DSP/memory module (40). The DSP/memory module (40) includes semiconductor memory (42) and digital signal processor circuitry (44) including one or more digital signal processors (56). The DSP/memory module (40) may be placed in standard main memory sockets, such as a SIMM or DIMM sockets, and used as conventional main memory. The memory module can also be used in a smart mode, wherein the digital signal processor (56) performs operations on data for retrieval by the main processing unit (12).
摘要翻译： 计算机系统包括耦合到DSP /存储器模块（40）的主处理单元（12）。 DSP /存储器模块（40）包括半导体存储器（42）和包括一个或多个数字信号处理器（56）的数字信号处理器电路（44）。 DSP /存储器模块（40）可以被放置在诸如SIMM或DIMM插槽的标准主存储器插槽中，并且被用作传统的主存储器。 存储器模块也可以以智能模式使用，其中数字信号处理器（56）对由主处理单元（12）检索的数据执行操作。
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