公开(公告)号：US20170011799A1

公开(公告)日：2017-01-12

申请号：US14996249

申请日：2016-01-15

申请人： JI-SANG LEE ,  DONGHUN KWAK ,  DAESEOK BYEON ,  CHIWEON YOON

发明人： JI-SANG LEE ,  DONGHUN KWAK ,  DAESEOK BYEON ,  CHIWEON YOON

IPC分类号： G11C16/10 ,  G11C16/24 ,  G11C16/04 ,  G11C16/30 ,  G11C16/08 ,  G11C16/26

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/24 ,  G11C16/26

摘要： A nonvolatile memory includes a memory cell array, a row decoder circuit, and a page buffer circuit. The row decoder circuit applies a turn-on voltage to string selection lines, which are connected to string selection transistors of a selected memory block, at a first precharge operation in response to a write command received from an external device. The page buffer circuit applies, in response to the write command, a first voltage to bit lines, which are connected to the string selection transistors, through a first precharge circuit at the first precharge operation regardless of loaded data and applies the first voltage and a second voltage to the bit lines through a second precharge circuit at a second precharge operation based on the loaded data. During the first precharge operation, write data is loaded onto the page buffer circuit.

摘要翻译： 非易失性存储器包括存储单元阵列，行解码器电路和页缓冲电路。 行解码器电路响应于从外部设备接收到的写入命令，在第一预充电操作时，对连接到所选存储块的串选择晶体管的串选择线施加导通电压。 页缓冲器电路响应于写入命令，在第一预充电操作下，连接到串选择晶体管的第一电压至位线，而不管加载数据如何，并施加第一电压和 基于所加载的数据，在第二预充电操作中通过第二预充电电路对位线施加第二电压。 在第一预充电操作期间，写数据被加载到页缓冲电路。

公开(公告)号：US20170140824A1

公开(公告)日：2017-05-18

申请号：US15342027

申请日：2016-11-02

申请人： DONGHUN KWAK ,  DAESEOK BYEON ,  CHIWEON YOON

发明人： DONGHUN KWAK ,  DAESEOK BYEON ,  CHIWEON YOON

IPC分类号： G11C16/08 ,  G11C16/04

CPC分类号： G11C16/08 ,  G11C16/0483

摘要： A nonvolatile memory device includes a memory cell array having a first plane and a second plane and an address decoder connected to the first plane through first string select lines and connected to the second plane through second string select line. The address decoder provides a string select signal and a string unselect signal to the first and second string select lines. The address decoder independently provides the string select signal and the string unselect signal to the first and second string select lines in each plane based on different string select line addresses corresponding to the first and second planes.