公开(公告)号：US20030168695A1

公开(公告)日：2003-09-11

申请号：US10384897

申请日：2003-03-07

Applicant: International Rectifier Corp.

Inventor： Ritu Sodhi ,  Hamilton Lu ,  Milton J. Boden

IPC: H01L029/76 ,  H01L029/94 ,  H01L031/062 ,  H01L031/113 ,  H01L031/119

CPC classification number: H01L29/7813 ,  H01L29/4933

Abstract: The tops of the conductive polysilicon gates of a trench device have a layer of a silicide such as titanium silicide which is more conductive than the polysilicon gate, thereby reducing gate resistance.

Abstract translation: 沟槽器件的导电多晶硅栅极的顶部具有比多晶硅栅极更导电的诸如硅化钛的硅化物层，从而降低栅极电阻。

公开(公告)号：US20020132456A1

公开(公告)日：2002-09-19

申请号：US10082532

申请日：2002-02-21

Applicant: International Rectifier Corp.

Inventor： Hamilton Lu

IPC: H01L021/28

CPC classification number: H01L21/324 ,  H01L21/28061 ,  H01L29/4933

Abstract: A single rapid thermal anneal (RTA) process is used to form a low resistivity titanium silicide layer atop a polysilicon gate layer for a MOSgated device. The process employs an amorphous silicon layer formed atop the polysilicon layer, followed by forming a titanium layer atop the amorphous silicon. A single RTA process at a temperature below the temperature of contamination diffusion is carried out, preferably at about 650null C. for 30 seconds. The top of the annealed titanium silicide layer is then stripped, and the remaining layer has a sheet Rho of less than about 2 ohms per square.

Abstract translation: 使用单个快速热退火（RTA）工艺在MOS多晶硅栅极层的顶部形成用于MOS器件的低电阻率硅化钛层。 该方法使用形成在多晶硅层顶上的非晶硅层，随后在非晶硅顶上形成钛层。 在低于污染扩散温度的温度下进行单个RTA方法，优选在约650℃下进行30秒。 然后剥离退火的硅化钛层的顶部，剩余的层具有小于约2欧姆/平方的片材Rho。