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公开(公告)号：US20180167974A1
公开(公告)日：2018-06-14
申请号：US15890680
申请日：2018-02-07
申请人： Intel Corporation
发明人： Qinghua Li , Honggang Li , Huaning Niu , Yi Hsuan , Yuan Zhu , Xiaogang Chen , Jong-Kae Fwu , Alexei Vladimirovich Davydov , Hujun Yin , Xintian E. Lin , Wendy C. Wong , Yujian Zhang , Apostolos Papathanassiou
IPC分类号： H04W74/08 , H04W72/08 , H04W4/70 , H04L5/00 , H04L5/14 , H04W4/06 , H04W24/02 , H04W24/10 , H04W72/04 , H04W36/08 , H04W28/08 , H04W28/02 , H04L12/18 , H04W76/19 , H04W36/00
CPC分类号： H04W74/0808 , H04L5/0001 , H04L5/0023 , H04L5/0037 , H04L5/0044 , H04L5/0048 , H04L5/0053 , H04L5/0064 , H04L5/0094 , H04L5/14 , H04L12/189 , H04W4/06 , H04W4/70 , H04W24/02 , H04W24/10 , H04W28/02 , H04W28/0268 , H04W28/08 , H04W36/0016 , H04W36/08 , H04W72/04 , H04W72/0406 , H04W72/042 , H04W72/085 , H04W74/0833 , H04W76/10 , H04W76/19 , Y02D70/00 , Y02D70/1224 , Y02D70/1242 , Y02D70/1262 , Y02D70/1264 , Y02D70/142 , Y02D70/144 , Y02D70/146 , Y02D70/164 , Y02D70/21 , Y02D70/24
摘要： A signal structure for use in D2D communications is described. In one embodiment, a preamble for automatic gain control at the receiver end is included in the transmitted signal. Techniques for scheduling of D2D transmissions using carrier sensing multiple access (CSMA) and a power control schemes for interference management are also described.
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公开(公告)号：US09723508B2
公开(公告)日：2017-08-01
申请号：US14646524
申请日：2013-12-03
申请人： Intel Corporation
发明人： Alexei Davydov , Seunghee Han , Yi Hsuan , Jong-Kae Fwu , Gregory Morozov
IPC分类号： H04W72/08 , H04W24/10 , H04W72/12 , H04B1/3827 , H04W84/18 , H04W92/18 , H04W72/04 , H04L25/03 , H04L5/00 , H04W36/10 , H04W52/40 , H04W76/04 , H04J11/00 , H04W76/02 , H04W52/02 , H04L1/00 , H04W24/02 , H04L25/02 , H04B7/0452 , H04B7/06 , H04B7/155 , H04L1/18 , H04W84/04 , H04L27/00
CPC分类号： H04B1/12 , H04B1/3827 , H04B7/0452 , H04B7/0617 , H04B7/15557 , H04B17/24 , H04B17/26 , H04B17/345 , H04J11/005 , H04J11/0053 , H04L1/0003 , H04L1/0054 , H04L1/1854 , H04L1/1867 , H04L5/0007 , H04L5/0048 , H04L5/0053 , H04L5/0055 , H04L5/0057 , H04L5/0058 , H04L5/0092 , H04L25/0202 , H04L25/0206 , H04L25/03305 , H04L27/0008 , H04W24/02 , H04W24/10 , H04W36/10 , H04W40/16 , H04W52/0261 , H04W52/40 , H04W72/0406 , H04W72/042 , H04W72/048 , H04W72/0486 , H04W72/08 , H04W72/082 , H04W72/12 , H04W72/1205 , H04W72/121 , H04W72/1242 , H04W72/1247 , H04W76/14 , H04W76/27 , H04W76/28 , H04W84/042 , H04W84/18 , H04W92/18 , Y02D70/00 , Y02D70/1224 , Y02D70/1226 , Y02D70/1242 , Y02D70/1262 , Y02D70/1264 , Y02D70/142 , Y02D70/144 , Y02D70/146 , Y02D70/164 , Y02D70/21 , Y02D70/24
摘要： A User Equipment and an eNodeB system are configured for performing interference mitigation in the UE. Input circuitry in the wireless communication device receives an OFDM downlink channel signal associated with a serving cell and receives downlink control information for an interfering cell. The downlink control information is used by the UE to perform channel estimation for the interfering cell. An interference mitigation module is provided for calculating an interference-mitigated version of the received channel signal using estimated channel transfer functions for both the serving cell and the interfering cell, power control parameters and using set of modulation constellation points corresponding to the OFDM downlink channel. Other embodiments may be described and claimed.
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公开(公告)号：US20160381708A1
公开(公告)日：2016-12-29
申请号：US15261439
申请日：2016-09-09
申请人： Intel Corporation
发明人： Qinghua Li , Honggang Li , Huaning Niu , Yi Hsuan , Yuan Zhu , Xiaogang Chen , Jong-Kae Fwu , Alexei Vladimirovich Davydov , Hujun Yin , Xintian E. Lin , Wendy C. Wong , Yujian Zhang , Apostolos Papathanassiou
CPC分类号： H04W74/0808 , H04L5/0001 , H04L5/0023 , H04L5/0037 , H04L5/0044 , H04L5/0048 , H04L5/0053 , H04L5/0064 , H04L5/0094 , H04L5/14 , H04L12/189 , H04W4/06 , H04W4/70 , H04W24/02 , H04W24/10 , H04W28/02 , H04W28/0268 , H04W28/08 , H04W36/0016 , H04W36/08 , H04W72/04 , H04W72/0406 , H04W72/042 , H04W72/085 , H04W74/0833 , H04W76/10 , H04W76/19 , Y02D70/00 , Y02D70/1224 , Y02D70/1242 , Y02D70/1262 , Y02D70/1264 , Y02D70/142 , Y02D70/144 , Y02D70/146 , Y02D70/164 , Y02D70/21 , Y02D70/24
摘要： A signal structure for use in D2D communications is described. In one embodiment, a preamble for automatic gain control at the receiver end is included in the transmitted signal. Techniques for scheduling of D2D transmissions using carrier sensing multiple access (CSMA) and a power control schemes for interference management are also described.
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公开(公告)号：US10091818B2
公开(公告)日：2018-10-02
申请号：US15890680
申请日：2018-02-07
申请人： Intel Corporation
发明人： Qinghua Li , Honggang Li , Huaning Niu , Yi Hsuan , Yuan Zhu , Xiaogang Chen , Jong-Kae Fwu , Alexei Vladimirovich Davydov , Hujun Yin , Xintian E. Lin , Wendy C. Wong , Yujian Zhang , Apostolos Papathanassiou
IPC分类号： H04W74/08 , H04W28/08 , H04W28/02 , H04L5/00 , H04L5/14 , H04W72/04 , H04W4/06 , H04W72/08 , H04W24/02 , H04W24/10 , H04W36/08 , H04W4/70 , H04L12/18 , H04W36/00 , H04W76/19
摘要： A signal structure for use in D2D communications is described. In one embodiment, a preamble for automatic gain control at the receiver end is included in the transmitted signal. Techniques for scheduling of D2D transmissions using carrier sensing multiple access (CSMA) and a power control schemes for interference management are also described.
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公开(公告)号：US09936521B2
公开(公告)日：2018-04-03
申请号：US15261439
申请日：2016-09-09
申请人： Intel Corporation
发明人： Qinghua Li , Honggang Li , Huaning Niu , Yi Hsuan , Yuan Zhu , Xiaogang Chen , Jong-Kae Fwu , Alexei Vladimirovich Davydov , Hujun Yin , Xintian E. Lin , Wendy C. Wong , Yujian Zhang , Apostolos Papathanassiou
IPC分类号： H04W74/08 , H04W28/08 , H04W76/02 , H04W4/06 , H04L5/14 , H04L5/00 , H04W28/02 , H04W72/04 , H04W24/10 , H04W36/08 , H04W24/02 , H04W4/00 , H04W72/08 , H04L12/18 , H04W36/00
CPC分类号： H04W74/0808 , H04L5/0001 , H04L5/0023 , H04L5/0037 , H04L5/0044 , H04L5/0048 , H04L5/0053 , H04L5/0064 , H04L5/0094 , H04L5/14 , H04L12/189 , H04W4/06 , H04W4/70 , H04W24/02 , H04W24/10 , H04W28/02 , H04W28/0268 , H04W28/08 , H04W36/0016 , H04W36/08 , H04W72/04 , H04W72/0406 , H04W72/042 , H04W72/085 , H04W74/0833 , H04W76/10 , H04W76/19 , Y02D70/00 , Y02D70/1224 , Y02D70/1242 , Y02D70/1262 , Y02D70/1264 , Y02D70/142 , Y02D70/144 , Y02D70/146 , Y02D70/164 , Y02D70/21 , Y02D70/24
摘要： A signal structure for use in D2D communications is described. In one embodiment, a preamble for automatic gain control at the receiver end is included in the transmitted signal. Techniques for scheduling of D2D transmissions using carrier sensing multiple access (CSMA) and a power control schemes for interference management are also described.
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公开(公告)号：US09661658B2
公开(公告)日：2017-05-23
申请号：US13729164
申请日：2012-12-28
申请人： Intel Corporation
发明人： Qinghua Li , Honggang Li , Huaning Niu , Yi Hsuan , Yuan Zhu , Xiaogang Chen , Jong-Kae Fwu , Alexei Davydov , Hujun Yin , Xintian E Lin , Wendy C. Wong , Yujian Zhang , Apostolos Papathanassiou
IPC分类号： H04W74/08 , H04W28/08 , H04W76/02 , H04W4/06 , H04L5/14 , H04L5/00 , H04W28/02 , H04W72/04 , H04W24/10 , H04W36/08 , H04W24/02 , H04W4/00 , H04W72/08 , H04L12/18 , H04W36/00
CPC分类号： H04W74/0808 , H04L5/0001 , H04L5/0023 , H04L5/0037 , H04L5/0044 , H04L5/0048 , H04L5/0053 , H04L5/0064 , H04L5/0094 , H04L5/14 , H04L12/189 , H04W4/06 , H04W4/70 , H04W24/02 , H04W24/10 , H04W28/02 , H04W28/0268 , H04W28/08 , H04W36/0016 , H04W36/08 , H04W72/04 , H04W72/0406 , H04W72/042 , H04W72/085 , H04W74/0833 , H04W76/10 , H04W76/19 , Y02D70/00 , Y02D70/1224 , Y02D70/1242 , Y02D70/1262 , Y02D70/1264 , Y02D70/142 , Y02D70/144 , Y02D70/146 , Y02D70/164 , Y02D70/21 , Y02D70/24
摘要： A signal structure for use in D2D communications is described. In one embodiment, a preamble for automatic gain control at the receiver end is included in the transmitted signal. Techniques for scheduling of D2D transmissions using carrier sensing multiple access (CSMA) and a power control schemes for interference management are also described.
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