公开(公告)号：US20210216365A1

公开(公告)日：2021-07-15

申请号：US17058309

申请日：2018-09-19

Applicant: Intel Corporation

Inventor： Yan Zhao ,  Zhi Wang ,  Weinan Li

IPC: G06F9/48 ,  G06F9/50 ,  G06F9/30

Abstract: An embodiment of a semiconductor package apparatus may include technology to manage one or more virtual graphic processor units, and co-schedule the one or more virtual graphic processor units based on both general processor instructions and graphics processor instructions. Other embodiments are disclosed and claimed.

公开(公告)号：US20240202025A1

公开(公告)日：2024-06-20

申请号：US18394232

申请日：2023-12-22

Applicant: Intel Corporation

Inventor： Yan Zhao ,  Zhi Wang ,  Weinan Li

IPC: G06F9/48 ,  G06F9/30 ,  G06F9/50

CPC classification number: G06F9/4881 ,  G06F9/3004 ,  G06F9/30079 ,  G06F9/505 ,  G06F9/5077

Abstract: An embodiment of a semiconductor package apparatus may include technology to manage one or more virtual graphic processor units, and co-schedule the one or more virtual graphic processor units based on both general processor instructions and graphics processor instructions. Other embodiments are disclosed and claimed.

公开(公告)号：US11907377B2

公开(公告)日：2024-02-20

申请号：US17251307

申请日：2018-10-30

Applicant: Intel Corporation

Inventor： Weinan Li ,  Yan Zhao ,  Zhi Wang

IPC: G06F21/57 ,  G06F21/84 ,  G06T1/20 ,  G06T1/60

CPC classification number: G06F21/577 ,  G06F21/84 ,  G06T1/20 ,  G06T1/60 ,  G06F2221/034

Abstract: Systems, apparatuses and methods may provide for technology that sets a write protection flag in a guest command buffer associated with a virtual machine and injects a semaphore command into a shadow command buffer in response to a fault. The fault is to correspond to a write of a graphics command to the guest command buffer by code executing in graphics hardware. In one example, the technology also conducts a security scan of the graphics command in response to a context switch in the graphics hardware, wherein the context switch is to be associated with the semaphore command.

公开(公告)号：US20210256139A1

公开(公告)日：2021-08-19

申请号：US17251307

申请日：2018-10-30

Applicant: Intel Corporation

Inventor： Weinan Li ,  Yan Zhao ,  Zhi Wang

IPC: G06F21/57 ,  G06F21/84 ,  G06T1/20 ,  G06T1/60

Abstract: Systems, apparatuses and methods may provide for technology that sets a write protection flag in a guest command buffer associated with a virtual machine and injects a semaphore command into a shadow command buffer in response to a fault. The fault is to correspond to a write of a graphics command to the guest command buffer by code executing in graphics hardware. In one example, the technology also conducts a security scan of the graphics command in response to a context switch in the graphics hardware, wherein the context switch is to be associated with the semaphore command.

公开(公告)号：US12182899B2

公开(公告)日：2024-12-31

申请号：US17598267

申请日：2019-06-24

Applicant: Intel Corporation

Inventor： Weinan Li ,  Yan Zhao ,  Zhi Wang ,  Wei Zhang

IPC: G06T1/20 ,  G06F9/50 ,  G06T1/60

Abstract: An apparatus and method for scheduling workloads across virtualized graphics processors. For example, one embodiment of a graphics processing apparatus comprises first graphics processing resources to process graphics commands and execute graphics data; workload scheduling circuitry to schedule workloads for execution on the first graphics processing resources; and workload queuing circuitry to implement a local queue to store local workload entries, each local workload entry associated with a locally-submitted workload and an external workload queue to store external workload entries, each external workload entry associated with an externally-submitted workload submitted for execution by an external graphics processing apparatus, in one embodiment, the workload scheduling circuitry schedules the locally-submitted workloads identified in the local queue and externally-submitted workloads identified in the external workload queue for processing by specified portions of the first graphics processing resources.

公开(公告)号：US11900157B2

公开(公告)日：2024-02-13

申请号：US17058309

申请日：2018-09-19

Applicant: Intel Corporation

Inventor： Yan Zhao ,  Zhi Wang ,  Weinan Li

IPC: G06F9/48 ,  G06F9/50 ,  G06F9/30

CPC classification number: G06F9/4881 ,  G06F9/3004 ,  G06F9/30079 ,  G06F9/505 ,  G06F9/5077

Abstract: An embodiment of a semiconductor package apparatus may include technology to manage one or more virtual graphic processor units, and co-schedule the one or more virtual graphic processor units based on both general processor instructions and graphics processor instructions. Other embodiments are disclosed and claimed.