公开(公告)号：US11923290B2

公开(公告)日：2024-03-05

申请号：US16913859

申请日：2020-06-26

申请人： Intel Corporation

发明人： Siddharth Chouksey ,  Gilbert Dewey ,  Nazila Haratipour ,  Mengcheng Lu ,  Jitendra Kumar Jha ,  Jack T. Kavalieros ,  Matthew V. Metz ,  Scott B Clendenning ,  Eric Charles Mattson

IPC分类号： H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L29/78

CPC分类号： H01L23/5226 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/53266 ,  H01L29/785 ,  H01L2029/7858

摘要： Embodiments disclosed herein include semiconductor devices with source/drain interconnects that include a barrier layer. In an embodiment the semiconductor device comprises a source region and a drain region. In an embodiment, a semiconductor channel is between the source region and the drain region, and a gate electrode is over the semiconductor channel. In an embodiment, the semiconductor device further comprises interconnects to the source region and the drain region. In an embodiment, the interconnects comprise a barrier layer, a metal layer, and a fill metal.