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公开(公告)号:US20170221793A1
公开(公告)日:2017-08-03
申请号:US15197129
申请日:2016-06-29
Applicant: Intel Corporation
Inventor: Jeffory L. SMALLEY , Susan F. SMITH , Thu HUYNH , Mani PRAKASH
IPC: H01L23/427 , H01L25/00 , H01L25/065 , H05K7/20 , H05K1/02
CPC classification number: H01L23/427 , H01L23/3672 , H01L23/473 , H01L25/0655 , H01L25/50 , H05K1/0203 , H05K7/20336 , H05K7/20409 , H05K7/20509 , H05K2201/10522
Abstract: An apparatus including a primary device and at least one secondary device coupled to a substrate; a heat exchanger disposed on the primary device and on the at least one secondary device, wherein the heat exchanger includes at least one portion disposed over an area corresponding to the primary device or the at least one second device including a deflectable surface; and at least one thermally conductive conduit coupled to the heat exchanger. A method including placing a heat exchanger on a multi-chip package, the heat exchanger including the heat exchanger including at least one floating section operable to move in a direction toward or away from at least one of the plurality of dice and at least one thermally conductive conduit disposed in a channel of the heat exchanger and connected to the at least one floating section; and coupling the heat exchanger to the multi-chip package.
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公开(公告)号:US20210191490A1
公开(公告)日:2021-06-24
申请号:US17191564
申请日:2021-03-03
Applicant: Intel Corporation
Inventor: Phani Kumar KANDULA , Eric J. DEHAEMER , Dorit SHAPIRA , Ramkumar NAGAPPAN , Vivek GARG , Fuat KECELI , Mani PRAKASH , David C. HOLCOMB , Horthense D. TAMDEM , Olivier FRANZA , Vjekoslav SVILAN
IPC: G06F1/324
Abstract: Methods and apparatus for balancing power between discrete components, such as processing units (e.g., CPUs) and accelerators in a compute node or platform. Power consumption of the compute platform is monitored to detect for conditions under which a threshold (e.g., power supply capacity threshold) is exceeded. In response, the operating frequencies of a processing unit and/or other platform components such as accelerators, are adjusted to reduce the power consumption of the platform to return below the threshold. Power limit biasing hints (scaling weights) are provided to platform components, along with a power violation index, which are used to adjust the operating frequencies of the platform components. Optionally, a processing unit can calculate the power violation index and the scaling weights and directly control the frequencies of itself and platform components. Embodiments of multi-socket platforms are also provided.
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公开(公告)号:US20190067158A1
公开(公告)日:2019-02-28
申请号:US16175712
申请日:2018-10-30
Applicant: Intel Corporation
Inventor: Jeffory L. SMALLEY , Susan F. SMITH , Mani PRAKASH , Tao LIU , Henry C. BOSAK , Harvey R. KOFSTAD , Almanzo T. ORTIZ
IPC: H01L23/367 , H01L23/433 , H01L25/065 , H01L23/40
Abstract: An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first passive heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second passive heat exchanger disposed on the at least one secondary device; at least one first spring operable to apply a force to the first heat exchanger in a direction of the primary device; and at least one second spring operable to apply a force to the second heat exchanger in the direction of the secondary device. A method including placing a passive heat exchanger on a multi-chip package, and deflecting a spring to apply a force in a direction of an at least one secondary device on the package.
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公开(公告)号:US20200327912A1
公开(公告)日:2020-10-15
申请号:US16911168
申请日:2020-06-24
Applicant: Intel Corporation
Inventor: Xiang LI , Phil GENG , George VERGIS , Mani PRAKASH
Abstract: A connector includes mounting tabs that are extended relative to traditional mounting tabs. On a back side of the printed circuit board (PCB), the mounting tabs connect to a back plate. The mounting tabs extend through the PCB and connect with the back plate, which provides improved structural integrity. Depending on the connector, the use of the mounting tabs can use existing mounting holes for the connector and remove the need for additional mounting holes.
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公开(公告)号:US20160276243A1
公开(公告)日:2016-09-22
申请号:US14767843
申请日:2014-09-27
Applicant: INTEL CORPORATION
Inventor: Jeffory L. SMALLEY , Susan F. SMITH , Mani PRAKASH , Tao LIU , Henry C. BOSAK , Almanzo T. ORTIZ
IPC: H01L23/367 , H01L25/065 , H01L23/433
CPC classification number: H01L23/3677 , H01L23/3675 , H01L23/4093 , H01L23/4338 , H01L25/0655 , H01L2924/0002 , H01L2924/00
Abstract: An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first passive heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second passive heat exchanger disposed on the at least one secondary device; at least one first spring operable to apply a force to the first heat exchanger in a direction of the primary device; and at least one second spring operable to apply a force to the second heat exchanger in the direction of the secondary device. A method including placing a passive heat exchanger on a multi-chip package, and deflecting a spring to apply a force in a direction of an at least one secondary device on the package.
Abstract translation: 一种装置,包括主要装置和至少一个辅助装置,其以平面阵列耦合到基板; 第一被动式热交换器,其设置在所述主装置上并且在对应于所述至少一个次级装置的区域上具有开口; 设置在所述至少一个次级装置上的第二被动热交换器; 至少一个第一弹簧,其可操作以在所述主装置的方向上向所述第一热交换器施加力; 以及至少一个第二弹簧,其可操作以在所述次级装置的方向上向所述第二热交换器施加力。 一种方法,包括将被动热交换器放置在多芯片封装上,以及使弹簧偏转以在所述封装上的至少一个次级装置的方向施加力。
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