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公开(公告)号:US20250067925A1
公开(公告)日:2025-02-27
申请号:US18236216
申请日:2023-08-21
Applicant: Intel Corporation
Inventor: Chia-Pin CHIU , Kaveh HOSSEINI
Abstract: Embodiments herein relate to systems, apparatuses, techniques or processes for packages that include a glass substrate, with one or more photonic integrated circuits embedded into cavities within the glass substrate. Dies may be on the glass substrate and electrically coupled with the embedded photonic integrated circuits. Photonic wire bonds may optically couple the embedded photonic integrated circuits with one or more optical waveguides that are within the glass substrate. Other embodiments may be described and/or claimed.
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2.
公开(公告)号:US20230314850A1
公开(公告)日:2023-10-05
申请号:US17710716
申请日:2022-03-31
Applicant: Intel Corporation
Inventor: Chia-Pin CHIU , Kaveh HOSSEINI , Omkar KARHADE , Tim Tri HOANG
CPC classification number: G02F1/0147 , G02B6/29395 , G02F2203/15 , G02B6/2934
Abstract: Embodiments disclosed herein include an on-cavity photonic integrated circuit (OCPIC). In an embodiment, the OCPIC comprises a laser transmitter, that comprises a row with four bumps, and a micro-ring resonator (MRR) in the row between a first bump and a second bump of the four bumps. In an embodiment, a cavity is below the MRR, where a diameter of the cavity is substantially equal to a spacing between the first bump and the second bump.
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公开(公告)号:US20230101340A1
公开(公告)日:2023-03-30
申请号:US17485295
申请日:2021-09-24
Applicant: Intel Corporation
Inventor: Kaveh HOSSEINI , Omkar KARHADE , Ravindranath V. MAHAJAN , Sergey Yuryevich SHUMARAYEV , Yew F. KOK , Sai VADLAMANI
IPC: H01L25/065 , H01L23/00 , H01L21/48 , H01L25/00
Abstract: Embodiments disclosed herein include electronic packages and methods of assembling an electronic package. In an embodiment, an electronic package comprises a package substrate with a stepped top surface, and a first die on a first plateau of the stepped top surface. In an embodiment, a second die is on a second plateau of the stepped top surface, where the second die extends over the first die, In an embodiment, a third die is on a third plateau of the stepped top surface, where the third die extends over the second die.
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公开(公告)号:US20220190918A1
公开(公告)日:2022-06-16
申请号:US17119844
申请日:2020-12-11
Applicant: Intel Corporation
Inventor: Brandon C. MARIN , Kaveh HOSSEINI , Conor O'KEEFFE , Hiroki TANAKA
Abstract: Embodiments disclosed herein include photonics systems with a dual polarization module. In an embodiment, a photonics patch comprises a patch substrate, and a photonics die over a first surface of the patch substrate. In an embodiment, a multiplexer is over a second surface of the patch substrate. In an embodiment, a first optical path from the photonics die to the multiplexer is provided for propagating a first optical signal, and a second optical path from the photonics die to the multiplexer is provided for propagating a second optical signal. In an embodiment, a Faraday rotator is provided along the second optical path to convert the second optical signal from a first mode to a second mode before reaching the multiplexer.
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5.
公开(公告)号:US20240061192A1
公开(公告)日:2024-02-22
申请号:US17889233
申请日:2022-08-16
Applicant: Intel Corporation
Inventor: Chia-Pin CHIU , Finian ROGERS , Tim Tri HOANG , Kaveh HOSSEINI , Omkar KARHADE
IPC: G02B6/42
CPC classification number: G02B6/425 , G02B6/4243
Abstract: Embodiments disclosed herein include electronic packages and methods of forming electronic packages. In an embodiment, the electronic package comprises a package substrate, a die coupled to the package substrate, a photonics integrated circuit (PIC) coupled to the die, and a fiber array unit (FAU) optically coupled to the PIC. In an embodiment, the FAU has a base with a first width and a protrusion with a second width that is smaller than the first width.
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公开(公告)号:US20230314849A1
公开(公告)日:2023-10-05
申请号:US17710703
申请日:2022-03-31
Applicant: Intel Corporation
Inventor: Chia-Pin CHIU , Kaveh HOSSEINI , Omkar KARHADE , Tim Tri HOANG
CPC classification number: G02F1/0147 , G02B6/29395 , G02B6/2934 , G02F2203/15
Abstract: Embodiments disclosed herein include optoelectronic systems and methods of forming such systems. In an embodiment, an optoelectronic system comprises a first substrate, a second substrate over the first substrate, a micro-ring resonator (MRR) over the second substrate, a heater integrated into the MRR, a cladding over the MRR, an opening through the first substrate and the second substrate to expose a bottom surface of the MRR, and a base spanning across the opening.
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公开(公告)号:US20230314704A1
公开(公告)日:2023-10-05
申请号:US17710709
申请日:2022-03-31
Applicant: Intel Corporation
Inventor: Chia-Pin CHIU , Kaveh HOSSEINI , Omkar KARHADE , Tim Tri HOANG
CPC classification number: G02B6/12007 , H01L25/167 , G02B6/29338
Abstract: Embodiments disclosed herein include an optoelectronic system. In an embodiment, the optoelectronic system comprises a first substrate, a second substrate over the first substrate, and a micro-ring resonator (MRR) over the second substrate. In an embodiment, a heater is integrated into the MRR, a cladding is over the MRR, and a temperature sensor is over the MRR in the cladding.
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8.
公开(公告)号:US20230314703A1
公开(公告)日:2023-10-05
申请号:US17710690
申请日:2022-03-31
Applicant: Intel Corporation
Inventor: Chia-Pin CHIU , Kaveh HOSSEINI , Omkar KARHADE
CPC classification number: G02B6/12007 , G02B6/136 , G02B6/29395
Abstract: Embodiments disclosed herein include optoelectronic systems and methods of forming such systems. In an embodiment, an optoelectronic system comprises a first substrate, a second substrate over the first substrate, and a micro-ring resonator (MRR) over the second substrate. In an embodiment, a heater is integrated into the MRR, a cladding is over the MRR, and an opening is through the first substrate and the second substrate to expose a bottom surface of the MRR.
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公开(公告)号:US20220197044A1
公开(公告)日:2022-06-23
申请号:US17131714
申请日:2020-12-22
Applicant: Intel Corporation
Inventor: Kaveh HOSSEINI , Conor O'KEEFFE , Brandon C. MARIN , Hiroki TANAKA
Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to a dual polarization chiplet that may be used by an optical receiver to split multi-polarized light traveling on a single fiber and carrying two or more light signals into two or more fibers each carrying the particular light signal. The dual polarization chiplet may also be used by an optical transmitter to combine multiple light signals to be transmitted onto a single fiber, where each of the multiple light signals are represented by a different polarization of a wavelength on the single fiber. Other embodiments may be described and/or claimed.
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10.
公开(公告)号:US20220196936A1
公开(公告)日:2022-06-23
申请号:US17132967
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Kaveh HOSSEINI , Xiaoqian LI , Conor O'KEEFFE , Jing FANG , Kevin P. MA , Shamsul ABEDIN
Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to a bidirectional optical grating coupler that may be used for testing. A photonic apparatus includes a first layer with electro-optical circuitry that is optically coupled with a bidirectional optical grating coupler. A second layer is physically coupled with a first side of the first layer and includes a first light path to optically coupled with the bidirectional optical grating coupler. A third layer is physically coupled with a second side of the first layer opposite the first side of the first layer, and includes a second light path that optically couples with the bidirectional grating coupler. Operational testing of the electro-optical circuitry is based in part on light received or transmitted through the second light path. Other embodiments may be described and/or claimed.
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