公开(公告)号：US10297046B2

公开(公告)日：2019-05-21

申请号：US15269665

申请日：2016-09-19

Applicant: Intel Corporation

Inventor： Bimal Poddar

IPC: G06T1/20 ,  G06T1/60 ,  G06T9/00 ,  G06T11/00 ,  G06T15/00 ,  G06T15/04 ,  G06T15/80 ,  G06T17/20

Abstract: Various embodiments are generally directed to techniques for reducing storage access bandwidth requirements in retrieving a texture image from a storage for applying textures to rendered objects by rendering the texture image itself into the storage to reduce the storage space in which the texture image is stored and to arrange portions of the texture image to be retrieved with fewer accesses. A device to render images includes a processor component; a color analyzer to determine a clear color of a texture image stored as source texture data; and a rendering routine to render the texture image into a storage as reduced texture data, the rendering routine to selectively store in the reduced texture data pixel color values retrieved from the source texture data that are associated with pixels of the texture image not colored with the clear color. Other embodiments are described and claimed.

公开(公告)号：US09824412B2

公开(公告)日：2017-11-21

申请号：US14494653

申请日：2014-09-24

Applicant: Intel Corporation

Inventor： Saurabh Sharma ,  Subramaniam Maiyuran ,  Thomas A. Piazza ,  Kalyan K. Bhiravabhatla ,  Peter L. Doyle ,  Paul A. Johnson ,  Bimal Poddar ,  Jon N. Hasselgren ,  Carl J. Munkberg ,  Tomas G. Akenine-Moller ,  Harri Syrja ,  Kevin Rogovin ,  Robert L. Farrell

IPC: G06T15/40 ,  G06T1/20 ,  G06T15/50 ,  G09G5/393

CPC classification number: G06T1/20 ,  G06T15/40 ,  G06T15/405 ,  G06T15/503 ,  G09G5/393

Abstract: In position-only shading, two geometry pipes exist, a trimmed down version called the Cull Pipe and a full version called the Replay Pipe. Thus, the Cull Pipe executes the position shaders in parallel with the main application, but typically generates the critical results much faster as it fetches and shades only the position attribute of the vertices and avoids the rasterization as well as the rendering of pixels for the frame buffer. Furthermore, the Cull Pipe uses these critical results to compute visibility information for all the triangles whether they are culled or not. On the other hand, the Replay Pipe consumes the visibility information to skip the culled triangles and shades only the visible triangles that are finally passed to the rasterization phase. Together the two pipes can hide the long cull runs of discarded triangles and can complete the work faster in some embodiments.

公开(公告)号：US10403024B2

公开(公告)日：2019-09-03

申请号：US15988157

申请日：2018-05-24

Applicant: Intel Corporation

Inventor： Bimal Poddar ,  Prasoonkumar Surti ,  Rahul P. Sathe

IPC: G06T15/00 ,  G06T1/60 ,  G06T15/04 ,  G06T15/50 ,  G06T19/20

Abstract: Embodiments provide for a graphics processing apparatus comprising render logic to detect rendering operations that will result in framebuffer having the same data as the initial clear color value and morphing such rendering operations to optimizations that are typically done for initial clearing of the framebuffer.

公开(公告)号：US20180268597A1

公开(公告)日：2018-09-20

申请号：US15988157

申请日：2018-05-24

Applicant: Intel Corporation

Inventor： Bimal Poddar ,  Prasoonkumar Surti ,  Rahul P. Sathe

IPC: G06T15/00 ,  G06T15/50 ,  G06T1/60 ,  G06T15/04 ,  G06T19/20

CPC classification number: G06T15/005 ,  G06T1/60 ,  G06T15/04 ,  G06T15/506 ,  G06T19/20 ,  G06T2200/04 ,  G06T2200/28 ,  G06T2210/62

Abstract: Embodiments provide for a graphics processing apparatus comprising render logic to detect rendering operations that will result in framebuffer having the same data as the initial clear color value and morphing such rendering operations to optimizations that are typically done for initial clearing of the framebuffer.

公开(公告)号：US09449362B2

公开(公告)日：2016-09-20

申请号：US14020716

申请日：2013-09-06

Applicant: Intel Corporation

Inventor： Bimal Poddar

IPC: G06T1/60 ,  G06T1/20 ,  G06T11/00

CPC classification number: G06T1/60 ,  G06T1/20 ,  G06T9/00 ,  G06T11/001

Abstract: Various embodiments are generally directed to techniques for reducing storage access bandwidth requirements in retrieving a texture image from a storage for applying textures to rendered objects by rendering the texture image itself into the storage to reduce the storage space in which the texture image is stored and to arrange portions of the texture image to be retrieved with fewer accesses. A device to render images includes a processor component; a color analyzer to determine a clear color of a texture image stored as source texture data; and a rendering routine to render the texture image into a storage as reduced texture data, the rendering routine to selectively store in the reduced texture data pixel color values retrieved from the source texture data that are associated with pixels of the texture image not colored with the clear color. Other embodiments are described and claimed.

Abstract translation: 各种实施例通常涉及用于通过将纹理图像本身呈现到存储器中以减少其中存储纹理图像的存储空间的用于从用于将纹理应用于渲染对象的存储器中检索纹理图像以减少存储访问带宽需求的技术，并且 以更少的访问方式排列要检索的纹理图像的部分。 用于渲染图像的设备包括处理器组件; 确定作为源纹理数据存储的纹理图像的清晰颜色的颜色分析器; 以及用于将纹理图像呈现为作为减少的纹理数据的存储的呈现例程，所述渲染程序选择性地存储从与未被着色的纹理图像的像素相关联的源纹理数据中检索的缩小纹理数据像素颜色值 清晰的颜色。 描述和要求保护其他实施例。

公开(公告)号：US09916682B2

公开(公告)日：2018-03-13

申请号：US14925325

申请日：2015-10-28

Applicant: Intel Corporation

Inventor： Rahul P. Sathe ,  Bimal Poddar ,  Jon N. Hasselgren

IPC: G06T15/80 ,  G06K9/46 ,  G06T15/00 ,  G06T15/04

CPC classification number: G06T15/80 ,  G06K9/4604 ,  G06K9/4671 ,  G06K2009/4666 ,  G06T15/005 ,  G06T15/04 ,  G06T2200/04 ,  G06T2200/28 ,  G06T2210/36 ,  G06T2215/16

Abstract: The power consumption of processor-based devices may be reduced by reducing the consumption of power during graphics processing. In some embodiments, the precision of pixel shading in parts of images where artifacts are less objectionable may be reduced. For example, in areas the user is not directly looking at, precision may be reduced to save power. At the same time, because a person is not focusing on those regions, even if usually perceptible artifacts occur because of the reduced precision, an overall pleasing depiction may be achieved.

公开(公告)号：US09741154B2

公开(公告)日：2017-08-22

申请号：US13682967

申请日：2012-11-21

Applicant: Intel Corporation

Inventor： Thomas A. Piazza ,  Bimal Poddar ,  Peter L. Doyle

IPC: G06T15/00 ,  G06T15/40

CPC classification number: G06T15/005 ,  G06T15/40

Abstract: According to some embodiments of the present invention, pixel throughput may be improved by performing depth tests and recording the results on the granularity of an input geometry object. An input geometry object is any object within the depiction represented by a primitive, such as a triangle within an input triangle list or a patch within an input patch list.

公开(公告)号：US20170228893A1

公开(公告)日：2017-08-10

申请号：US15269665

申请日：2016-09-19

Applicant: Intel Corporation

Inventor： Bimal Poddar

IPC: G06T9/00 ,  G06T17/20 ,  G06T15/00 ,  G06T15/80 ,  G06T15/04

CPC classification number: G06T9/00 ,  G06T1/20 ,  G06T1/60 ,  G06T11/001 ,  G06T15/005 ,  G06T15/04 ,  G06T15/80 ,  G06T17/20

Abstract: Various embodiments are generally directed to techniques for reducing storage access bandwidth requirements in retrieving a texture image from a storage for applying textures to rendered objects by rendering the texture image itself into the storage to reduce the storage space in which the texture image is stored and to arrange portions of the texture image to be retrieved with fewer accesses. A device to render images includes a processor component; a color analyzer to determine a clear color of a texture image stored as source texture data; and a rendering routine to render the texture image into a storage as reduced texture data, the rendering routine to selectively store in the reduced texture data pixel color values retrieved from the source texture data that are associated with pixels of the texture image not colored with the clear color. Other embodiments are described and claimed.

公开(公告)号：US09390463B2

公开(公告)日：2016-07-12

申请号：US13965087

申请日：2013-08-12

Applicant: Intel Corporation

Inventor： Bimal Poddar

IPC: G09G5/02 ,  G06T1/60 ,  G09G5/14 ,  G09G5/393 ,  G06T15/50

CPC classification number: G06T1/60 ,  G06T15/503 ,  G09G5/14 ,  G09G5/393 ,  G09G2340/10 ,  G09G2340/12 ,  G09G2360/122

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to determine color information for multiple graphical layers of a graphical display at a location of a pixel, and to determine a pixel color information for the pixel at the location based on the color information for each of the multiple graphical layers.

Abstract translation: 各种实施例通常涉及用于确定在像素的位置处的图形显示的多个图形层的颜色信息的装置，方法和其他技术，并且基于颜色信息确定位置处的像素的像素颜色信息 对于多个图形层中的每一个。

公开(公告)号：US09601092B2

公开(公告)日：2017-03-21

申请号：US14662603

申请日：2015-03-19

Applicant: Intel Corporation

Inventor： Michael Apodaca ,  Thomas A. Piazza ,  Bimal Poddar

IPC: G09G5/39 ,  G06T1/60 ,  G06T15/00

CPC classification number: G09G5/39 ,  G06T1/60 ,  G06T15/005 ,  G06T15/40

Abstract: The introduction of an “out-of-memory” marker in the sorted tile geometry sequence for a tile may aid in handling out-of-memory frames. This marker allows hardware to continue rendering using the original data stream instead of the sorted data stream. This enables use of the original data stream allows the system to continue rendering without requiring any driver intervention. During the visibility generation/sorting phase, the number of memory pages required for storing the data for a rendering pass is continuously tracked. This tracking includes tracking the pages that are required even if the hardware had not run out-of-memory. This information can be monitored by a graphics driver and the driver can provide more memory pages for the system to work at full efficiency.