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公开(公告)号：US20200321978A1
公开(公告)日：2020-10-08
申请号：US16905200
申请日：2020-06-18
申请人： Intel Corporation
发明人： Adee Ofir Ran , Amir Mezer , Alon Meisler , Assaf Benhamou , Itamar Levin , Yoni Landau
摘要： Computing devices and techniques for providing link partner health reporting are described. In one embodiment, for example, an apparatus may include at least one memory, and logic, at least a portion of the logic comprised in hardware coupled to the at least one memory, the logic to determine a plurality of error counters, each of the plurality of error counters associated with a number of errors, determine the number of errors for each data unit of a plurality of data units associated with a data block, increment each of the plurality of error counters corresponding with the number of errors for each data unit of the plurality of data units, provide a plurality of error counts for the data block to a link partner, the plurality of error counts corresponding to the number of errors accumulated in each of the plurality of error counters for the data block, and reset the plurality of error counters. Other embodiments are described and claimed.
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公开(公告)号：US10924132B2
公开(公告)日：2021-02-16
申请号：US16324172
申请日：2017-09-08
申请人： Intel Corporation
发明人： Adee Ofir Ran , Amir Mezer , Alon Meisler , Assaf Benhamou , Itamar Levin , Yoni Landau
摘要： Computing devices and techniques for providing link partner health reporting are described. In one embodiment, for example, an apparatus may include at least one memory, and logic, at least a portion of the logic comprised in hardware coupled to the at least one memory, the logic to determine a plurality of error counters, each of the plurality of error counters associated with a number of errors, determine the number of errors for each data unit of a plurality of data units associated with a data block, increment each of the plurality of error counters corresponding with the number of errors for each data unit of the plurality of data units, provide a plurality of error counts for the data block to a link partner, the plurality of error counts corresponding to the number of errors accumulated in each of the plurality of error counters for the data block, and reset the plurality of error counters. Other embodiments are described and claimed.
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公开(公告)号：US20190215008A1
公开(公告)日：2019-07-11
申请号：US16324172
申请日：2017-09-08
申请人： Intel Corporation
发明人： Adee Ofir Ran , Amir Mezer , Alon Meisler , Assaf Benhamou , Itamar Levin , Yoni Landau
CPC分类号： H03M13/015 , H03M13/09 , H03M13/13 , H03M13/15 , H03M13/1515 , H03M13/353 , H04L1/203
摘要： Computing devices and techniques for providing link partner health reporting are described. In one embodiment, for example, an apparatus may include at least one memory, and logic, at least a portion of the logic comprised in hardware coupled to the at least one memory, the logic to determine a plurality of error counters, each of the plurality of error counters associated with a number of errors, determine the number of errors for each data unit of a plurality of data units associated with a data block, increment each of the plurality of error counters corresponding with the number of errors for each data unit of the plurality of data units, provide a plurality of error counts for the data block to a link partner, the plurality of error counts corresponding to the number of errors accumulated in each of the plurality of error counters for the data block, and reset the plurality of error counters. Other embodiments are described and claimed.
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公开(公告)号：US11190208B2
公开(公告)日：2021-11-30
申请号：US16905200
申请日：2020-06-18
申请人： Intel Corporation
发明人： Adee Ofir Ran , Amir Mezer , Alon Meisler , Assaf Benhamou , Itamar Levin , Yoni Landau
摘要： Computing devices and techniques for providing link partner health reporting are described. In one embodiment, for example, an apparatus may include at least one memory, and logic, at least a portion of the logic comprised in hardware coupled to the at least one memory, the logic to determine a plurality of error counters, each of the plurality of error counters associated with a number of errors, determine the number of errors for each data unit of a plurality of data units associated with a data block, increment each of the plurality of error counters corresponding with the number of errors for each data unit of the plurality of data units, provide a plurality of error counts for the data block to a link partner, the plurality of error counts corresponding to the number of errors accumulated in each of the plurality of error counters for the data block, and reset the plurality of error counters. Other embodiments are described and claimed.
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5.发明授权Method, apparatus, and system for measurement of noise statistics and bit error ratio estimation 有权用于测量噪声统计和误码率估计的方法，装置和系统公开(公告)号：US09374202B2
公开(公告)日：2016-06-21
申请号：US13842320
申请日：2013-03-15
申请人： Intel Corporation
发明人： Adee O. Ran , Amir Mezer , Ophir Gazinski , Sanjay R. Ravi , David G. Ellis , Stephen J. Peters , Jeffrey M. Shuey
CPC分类号： H04L1/203
摘要： A sample voltage is received from a device at a first slicer element and a second slicer element. A decision by the first slicer element based on the sample voltage is identified and compared with a decision of the second slicer element based on the sample voltage. The decision of the second slicer element is to be generated from a comparison of the sample voltage with a reference voltage for the second slicer element. Comparing the decisions can be the basis of a soft error ratio determined for a device.
摘要翻译： 从第一限幅元件和第二限幅元件的装置接收采样电压。 基于样本电压确定第一限幅元件的判定，并根据采样电压与第二限幅元件的判定进行比较。 第二限幅元件的决定是从采样电压与第二限幅元件的参考电压的比较产生的。 比较决策可以是为设备确定的软错误率的基础。
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