公开(公告)号：US09728610B1

公开(公告)日：2017-08-08

申请号：US15017268

申请日：2016-02-05

Applicant: Infineon Technologies Americas Corp.

Inventor： Jianwei Wan ,  Scott Nelson ,  Srinivasan Kannan ,  Peter Kim

IPC: H01L21/338 ,  H01L29/732 ,  H01L31/109 ,  H01L29/205 ,  H01L29/20 ,  H01L29/778 ,  H01L31/0304 ,  H01L31/18 ,  H01L33/00 ,  H01L33/12 ,  H01L33/32 ,  H01S5/323 ,  H01L21/02

CPC classification number: H01L29/205 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/778 ,  H01L29/7786 ,  H01L31/03044 ,  H01L31/109 ,  H01L31/1856 ,  H01L33/0025 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/12 ,  H01L33/32 ,  H01S5/32341

Abstract: There are disclosed herein various implementations of a semiconductor component with a multi-layered nucleation body and method for its fabrication. The semiconductor component includes a substrate, a nucleation body situated over the substrate, and a group III-V semiconductor device situated over the nucleation body. The nucleation body includes a bottom layer formed at a low growth temperature, and a top layer formed at a high growth temperature. The nucleation body also includes an intermediate layer that is formed substantially continuously using a varying intermediate growth temperature.

公开(公告)号：US09608075B1

公开(公告)日：2017-03-28

申请号：US15173263

申请日：2016-06-03

Applicant: Infineon Technologies Americas Corp.

Inventor： Jianwei Wan ,  Mihir Tungare ,  Peter Kim ,  Seong-Eun Park ,  Scott Nelson ,  Srinivasan Kannan

IPC: H01L29/66 ,  H01L29/205 ,  H01L29/20 ,  H01L29/207 ,  H01L21/02 ,  H01L29/778

CPC classification number: H01L29/7786 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02579 ,  H01L21/02581 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/36

Abstract: A compound semiconductor device includes a first III-nitride buffer layer doped with carbon and/or iron, a second III-nitride buffer layer above the first III-nitride buffer layer and doped with carbon and/or iron, a first III-nitride device layer above the second III-nitride buffer layer, and a second III-nitride device layer above the first III-nitride device layer and having a different band gap than the first III-nitride device layer. A two-dimensional charge carrier gas arises along an interface between the first and second III-nitride device layers. The first III-nitride buffer layer has an average doping concentration of carbon and/or iron which is greater than that of the second III-nitride buffer layer. The second III-nitride buffer layer has an average doping concentration of carbon and/or iron which is comparable to or greater than that of the first III-nitride device layer. A method of manufacturing the compound semiconductor device is described.

公开(公告)号：US09761672B1

公开(公告)日：2017-09-12

申请号：US15057985

申请日：2016-03-01

Applicant: Infineon Technologies Americas Corp.

Inventor： Scott Nelson ,  Srinivasan Kannan

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/02 ,  H01L29/205 ,  H01L29/20 ,  H01L29/778 ,  H01L33/32 ,  H01L33/00 ,  H01L33/12 ,  H01L31/109 ,  H01L31/0304 ,  H01S5/323

CPC classification number: H01L29/205 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/778 ,  H01L29/7786 ,  H01L31/03044 ,  H01L31/109 ,  H01L33/0025 ,  H01L33/12 ,  H01L33/32 ,  H01S5/32341

Abstract: There are disclosed herein various implementations of a semiconductor component including one or more aluminum silicon nitride layers. The semiconductor component includes a substrate, a group III-V intermediate body situated over the substrate, a group III-V buffer layer situated over the group III-V intermediate body, and a group III-V device fabricated over the group III-V buffer layer. The group III-V intermediate body includes the one or more aluminum silicon nitride layers.

公开(公告)号：US20170256618A1

公开(公告)日：2017-09-07

申请号：US15057985

申请日：2016-03-01

Applicant: Infineon Technologies Americas Corp.

Inventor： Scott Nelson ,  Srinivasan Kannan

IPC: H01L29/205 ,  H01L29/778 ,  H01L33/32 ,  H01S5/323 ,  H01L33/12 ,  H01L31/109 ,  H01L31/0304 ,  H01L29/20 ,  H01L33/00

CPC classification number: H01L29/205 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/778 ,  H01L29/7786 ,  H01L31/03044 ,  H01L31/109 ,  H01L33/0025 ,  H01L33/12 ,  H01L33/32 ,  H01S5/32341

Abstract: There are disclosed herein various implementations of a semiconductor component including one or more aluminum silicon nitride layers. The semiconductor component includes a substrate, a group III-V intermediate body situated over the substrate, a group III-V buffer layer situated over the group III-V intermediate body, and a group III-V device fabricated over the group III-V buffer layer. The group III-V intermediate body includes the one or more aluminum silicon nitride layers.

公开(公告)号：US20170229548A1

公开(公告)日：2017-08-10

申请号：US15017268

申请日：2016-02-05

Applicant: Infineon Technologies Americas Corp.

Inventor： Jianwei Wan ,  Scott Nelson ,  Srinivasan Kannan ,  Peter Kim

IPC: H01L29/205 ,  H01L29/778 ,  H01L31/109 ,  H01L31/0304 ,  H01L21/02 ,  H01L33/00 ,  H01L33/12 ,  H01L33/32 ,  H01S5/323 ,  H01L29/20 ,  H01L31/18

CPC classification number: H01L29/205 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/778 ,  H01L29/7786 ,  H01L31/03044 ,  H01L31/109 ,  H01L31/1856 ,  H01L33/0025 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/12 ,  H01L33/32 ,  H01S5/32341

Abstract: There are disclosed herein various implementations of a semiconductor component with a multi-layered nucleation body and method for its fabrication. The semiconductor component includes a substrate, a nucleation body situated over the substrate, and a group III-V semiconductor device situated over the nucleation body. The nucleation body includes a bottom layer formed at a low growth temperature, and a top layer formed at a high growth temperature. The nucleation body also includes an intermediate layer that is formed substantially continuously using a varying intermediate growth temperature.