公开(公告)号：US09954089B2

公开(公告)日：2018-04-24

申请号：US15186860

申请日：2016-06-20

Applicant: Infineon Technologies Americas Corp.

Inventor： Chan Kyung Choi ,  Mihir Tungare ,  Peter Wook Kim

IPC: H01L29/10 ,  H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/06

CPC classification number: H01L29/7783 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/06 ,  H01L29/10 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/778 ,  H01L29/7786

Abstract: There are disclosed herein various implementations of a semiconductor component including a protrusion propagation body. The semiconductor component includes a substrate, a III-Nitride intermediate stack including the protrusion propagation body situated over the substrate, a III-Nitride buffer layer situated over the group III-V intermediate stack, and a III-Nitride device fabricated over the group III-V buffer layer. The protrusion propagation body includes at least a protrusion generating layer and two or more protrusion spreading multilayers.

公开(公告)号：US20170365699A1

公开(公告)日：2017-12-21

申请号：US15186860

申请日：2016-06-20

Applicant: Infineon Technologies Americas Corp.

Inventor： Chan Kyung Choi ,  Mihir Tungare ,  Peter Wook Kim

IPC: H01L29/778 ,  H01L29/205 ,  H01L29/20

CPC classification number: H01L29/7783 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/06 ,  H01L29/10 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/778 ,  H01L29/7786

Abstract: There are disclosed herein various implementations of a semiconductor component including a protrusion propagation body. The semiconductor component includes a substrate, a III-Nitride intermediate stack including the protrusion propagation body situated over the substrate, a III-Nitride buffer layer situated over the group III-V intermediate stack, and a III-Nitride device fabricated over the group III-V buffer layer. The protrusion propagation body includes at least a protrusion generating layer and two or more protrusion spreading multilayers.

公开(公告)号：US10211329B2

公开(公告)日：2019-02-19

申请号：US15184032

申请日：2016-06-16

Applicant: Infineon Technologies Americas Corp.

Inventor： Hyeongnam Kim ,  Mohamed Imam ,  Alain Charles ,  Jianwei Wan ,  Mihir Tungare ,  Chan Kyung Choi

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/41 ,  H01L29/205 ,  H01L29/417 ,  H01L29/423 ,  H01L29/43 ,  H01L29/06

Abstract: There are disclosed herein various implementations of a charge trapping prevention III-Nitride transistor. Such a transistor may be a III-Nitride high electron mobility transistor (HEMT) including a III-Nitride intermediate body situated over a substrate, a channel layer situated over the III-Nitride intermediate body, and a barrier layer situated over the channel layer. The channel layer and the barrier layer are configured to produce a two-dimensional electron gas (2DEG). In addition, the III-Nitride transistor includes a dielectric layer situated over the barrier layer, a gate coupled to the barrier layer, and a drain electrode and a source electrode each extending through the dielectric layer. The drain electrode makes ohmic contact with one or both of the barrier layer and a charge trapping prevention layer situated between the dielectric layer and the barrier layer.

公开(公告)号：US20180175183A1

公开(公告)日：2018-06-21

申请号：US15899127

申请日：2018-02-19

Applicant: Infineon Technologies Americas Corp.

Inventor： Chan Kyung Choi ,  Mihir Tungare ,  Peter Wook Kim

IPC: H01L29/778 ,  H01L29/06 ,  H01L29/20 ,  H01L29/10 ,  H01L29/205

CPC classification number: H01L29/7783 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/06 ,  H01L29/10 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/778 ,  H01L29/7786

Abstract: A semiconductor structure includes a substrate, a III-Nitride intermediate stack including the protrusion propagation body situated over the substrate, a transition body over the III-Nitride intermediate stack, a III-Nitride buffer layer situated over the transition body, and a III-Nitride device fabricated over the group III-V buffer layer. The protrusion propagation body includes at least a protrusion generating layer and two or more protrusion spreading multilayers.

公开(公告)号：US10411124B2

公开(公告)日：2019-09-10

申请号：US15899127

申请日：2018-02-19

Applicant: Infineon Technologies Americas Corp.

Inventor： Chan Kyung Choi ,  Mihir Tungare ,  Peter Wook Kim

IPC: H01L29/06 ,  H01L29/778 ,  H01L29/10 ,  H01L29/20 ,  H01L29/205 ,  H01L21/02

Abstract: A semiconductor structure includes a substrate, a III-Nitride intermediate stack including the protrusion propagation body situated over the substrate, a transition body over the III-Nitride intermediate stack, a III-Nitride buffer layer situated over the transition body, and a III-Nitride device fabricated over the group III-V buffer layer. The protrusion propagation body includes at least a protrusion generating layer and two or more protrusion spreading multilayers.

公开(公告)号：US20170365701A1

公开(公告)日：2017-12-21

申请号：US15184032

申请日：2016-06-16

Applicant: Infineon Technologies Americas Corp.

Inventor： Hyeongnam Kim ,  Mohamed Imam ,  Alain Charles ,  Jianwei Wan ,  Mihir Tungare ,  Chan Kyung Choi

IPC: H01L29/778 ,  H01L29/417 ,  H01L29/205 ,  H01L29/423 ,  H01L29/20

CPC classification number: H01L29/7787 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/41775 ,  H01L29/42356 ,  H01L29/432 ,  H01L29/7786

Abstract: There are disclosed herein various implementations of a charge trapping prevention III-Nitride transistor. Such a transistor may be a III-Nitride high electron mobility transistor (HEMT) including a III-Nitride intermediate body situated over a substrate, a channel layer situated over the III-Nitride intermediate body, and a barrier layer situated over the channel layer. The channel layer and the barrier layer are configured to produce a two-dimensional electron gas (2DEG). In addition, the III-Nitride transistor includes a dielectric layer situated over the barrier layer, a gate coupled to the barrier layer, and a drain electrode and a source electrode each extending through the dielectric layer. The drain electrode makes ohmic contact with one or both of the barrier layer and a charge trapping prevention layer situated between the dielectric layer and the barrier layer.