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1.发明申请公开(公告)号：US20190131234A1
公开(公告)日：2019-05-02
申请号：US15795077
申请日：2017-10-26
发明人： Torsten Groening , Thomas Nuebel , Reinhold Spanke
IPC分类号： H01L23/50 , H01L25/07 , H01L23/055 , H01L25/00 , H01L21/48
摘要： A power semiconductor module includes one or more power semiconductor dies attached to a first main face of a substrate, a plastic housing attached to the substrate, which together with the substrate encloses the one or more power semiconductor dies, a plurality of power terminals attached to the first main face of the substrate at a first end, and extending through the plastic housing at a second end to provide a point of external electrical connection for the one or more power semiconductor dies, a potting compound embedding the one or more power semiconductor dies, the first main face of the substrate and at least part of the first end of the plurality of power terminals, and an insulative coating applied only to parts of the plurality of power terminals disposed inside the plastic housing and in contact with just air. A corresponding method of manufacture also is provided.
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2.发明申请METHOD FOR PRODUCING A CIRCUIT CARRIER AND FOR CONNECTING AN ELECTRICAL CONDUCTOR TO A METALLIZATION LAYER OF A CIRCUIT CARRIER 审中-公开用于制造电路载体并将电导体连接到电路载体的金属化层的方法公开(公告)号：US20160001393A1
公开(公告)日：2016-01-07
申请号：US14751361
申请日：2015-06-26
发明人： Mark Essert , Marianna Nomann , Thomas Nuebel , Guido Strotmann
CPC分类号： B23K20/10 , B23K20/22 , B23K2101/38 , H05K1/0263 , H05K1/0306 , H05K3/328 , H05K2203/0285
摘要： One aspect of the invention relates to a method for producing a circuit carrier. For this purpose, an electrically insulating carrier is provided, having an upper side and also an underside opposite from the upper side. A first metal foil and a hardening material are likewise provided. Then, an upper metallization layer, which is arranged on the upper side and has a hardening area, is produced. In this case, at least one contiguous portion of the hardening area is created by at least part of the hardening material being diffused into the first metal foil.
摘要翻译： 本发明的一个方面涉及一种用于制造电路载体的方法。 为此，提供了一种电绝缘载体，其具有上侧以及与上侧相对的下侧。 同样提供第一金属箔和硬化材料。 然后，制造布置在上侧并具有硬化区域的上金属化层。 在这种情况下，硬化区域的至少一个连续部分由至少部分硬化材料扩散到第一金属箔中而产生。
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公开(公告)号：US10092974B2
公开(公告)日：2018-10-09
申请号：US14751361
申请日：2015-06-26
发明人： Mark Essert , Marianna Nomann , Thomas Nuebel , Guido Strotmann
摘要： One aspect of the invention relates to a method for producing a circuit carrier. For this purpose, an electrically insulating carrier is provided, having an upper side and also an underside opposite from the upper side. A first metal foil and a hardening material are likewise provided. Then, an upper metallization layer, which is arranged on the upper side and has a hardening area, is produced. In this case, at least one contiguous portion of the hardening area is created by at least part of the hardening material being diffused into the first metal foil.
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4.发明授权公开(公告)号：US10283447B1
公开(公告)日：2019-05-07
申请号：US15795077
申请日：2017-10-26
发明人： Torsten Groening , Thomas Nuebel , Reinhold Spanke
IPC分类号： H01L23/50 , H01L25/07 , H01L21/48 , H01L25/00 , H01L23/055
摘要： A power semiconductor module includes one or more power semiconductor dies attached to a first main face of a substrate, a plastic housing attached to the substrate, which together with the substrate encloses the one or more power semiconductor dies, a plurality of power terminals attached to the first main face of the substrate at a first end, and extending through the plastic housing at a second end to provide a point of external electrical connection for the one or more power semiconductor dies, a potting compound embedding the one or more power semiconductor dies, the first main face of the substrate and at least part of the first end of the plurality of power terminals, and an insulative coating applied only to parts of the plurality of power terminals disposed inside the plastic housing and in contact with just air. A corresponding method of manufacture also is provided.
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