CMOS-MEMS integration by sequential bonding method

    公开(公告)号:US09761557B2

    公开(公告)日:2017-09-12

    申请号:US14696994

    申请日:2015-04-27

    申请人: InvenSense, Inc.

    IPC分类号: H01L23/00 B81C1/00

    摘要: Methods for bonding two wafers are disclosed. In one aspect, a first wafer includes an integrated circuit and the second wafer including a MEMS device. The method comprises depositing a bond pad on a metal on the first wafer and sequentially bonding the first wafer to the second wafer utilizing first and second temperatures. The second wafer is bonded to the bond pad at the first temperature and the bond pad and the metal are bonded at the second temperature. In another aspect, a first wafer including an integrated circuit, the second wafer includes a MEMS device. The method comprises depositing a bond pad on a metal on one of the first wafer and the second wafer and bonding the first wafer to the second wafer at a first temperature via a direct bond interface. The method includes bonding the bond pad to the metal at a second temperature.

    MEMS-CMOS device that minimizes outgassing and methods of manufacture
    5.
    发明授权
    MEMS-CMOS device that minimizes outgassing and methods of manufacture 有权
    最小化除气的MEMS-CMOS器件和制造方法

    公开(公告)号:US09540228B2

    公开(公告)日:2017-01-10

    申请号:US14748012

    申请日:2015-06-23

    申请人: InvenSense, Inc.

    IPC分类号: B81B7/00 B81C1/00

    摘要: A MEMS device is disclosed. The MEMS device includes a first substrate. At least one structure is formed within the first substrate. The first substrate includes at least one first conductive pad thereon. The MEMS device also includes a second substrate. The second substrate includes a passivation layer. The passivation layer includes a plurality of layers. A top layer of the plurality of layers comprises an outgassing barrier layer. At least one second conductive pad and at least one electrode are coupled to the top layer. At least one first conductive pad is coupled to the at least one second conductive pad.

    摘要翻译: 公开了MEMS器件。 MEMS器件包括第一衬底。 在第一基板内形成至少一个结构。 第一衬底包括至少一个第一导电焊盘。 MEMS器件还包括第二衬底。 第二基板包括钝化层。 钝化层包括多个层。 多个层的顶层包括除气阻挡层。 至少一个第二导电焊盘和至少一个电极耦合到顶层。 至少一个第一导电焊盘耦合到所述至少一个第二导电焊盘。

    Method of increasing MEMS enclosure pressure using outgassing material
    9.
    发明授权
    Method of increasing MEMS enclosure pressure using outgassing material 有权
    使用排气材料增加MEMS外壳压力的方法

    公开(公告)号:US09452925B2

    公开(公告)日:2016-09-27

    申请号:US14832786

    申请日:2015-08-21

    申请人: InvenSense, Inc.

    摘要: Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.

    摘要翻译: 半导体制造工艺包括提供第一衬底,其具有设置在图案化顶层金属层上方的第一钝化层,并且还具有设置在第一钝化层上的第二钝化层; 第二钝化层具有顶表面。 所述方法还包括在第二钝化层的第一部分中形成开口,并且开口暴露第一钝化层的表面的一部分。 所述方法还包括图案化第二钝化层和第一钝化层以暴露图案化顶层金属层的部分并将第二衬底和第一衬底彼此结合。 接合发生在至少第一钝化层的暴露部分经历脱气的温度范围内。

    Internal electrical contact for enclosed MEMS devices
    10.
    发明授权
    Internal electrical contact for enclosed MEMS devices 有权
    封闭MEMS器件的内部电气接触

    公开(公告)号:US08822252B2

    公开(公告)日:2014-09-02

    申请号:US14033366

    申请日:2013-09-20

    申请人: InvenSense, Inc.

    IPC分类号: H01L21/00

    摘要: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.

    摘要翻译: 公开了一种在集成MEMS器件中制造电连接的方法。 该方法包括形成MEMS晶片。 形成MEMS晶片包括在第一半导体层中形成一个空腔,将第一半导体层与设置在第一半导体层和第二半导体层之间的电介质层结合到第二半导体层,并且通过第二半导体蚀刻至少一个通孔 层和介电层,并在第二半导体层上沉积导电材料并填充至少一个通孔。 形成MEMS晶片还包括图案化和蚀刻导电材料以形成一个间隔并在导电材料上沉积锗层,图案化和蚀刻锗层,以及图案化和蚀刻第二半导体层以限定一个MEMS结构。 该方法还包括将MEMS晶片接合到基底基板。