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公开(公告)号：US20180045766A1
公开(公告)日：2018-02-15
申请号：US15797440
申请日：2017-10-30
Applicant: International Business Machines Corporation
Inventor： Jose A. Hejase , Nanju Na , Nam H. Pham , Lloyd A. Walls
IPC: G01R29/26 , G01R31/00 , G01R31/3187
CPC classification number: G01R29/26 , G01R31/001 , G01R31/3187
Abstract: Functionality for estimating characteristics of an on-chip noise signal can be implemented on a processing module. An on-chip noise signal is determined at an on-chip determination point of a computer chip. The on-chip noise signal is converted to a frequency-varying signal using a voltage-controlled oscillator implemented on the computer chip. The frequency-varying signal is measured at an off-chip measurement point and frequency information is extracted from the frequency-varying signal. The frequency information is converted to a voltage level associated with the on-chip noise signal based on the relationship between an input voltage provided to the voltage-controlled oscillator and an output frequency generated by the voltage-controlled oscillator.
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公开(公告)号：US20160350195A1
公开(公告)日：2016-12-01
申请号：US14721862
申请日：2015-05-26
Applicant: International Business Machines Corporation
Inventor： Wiren D. Becker , Daniel M. Dreps , Jose A. Hejase , Glen A. Wiedemeier , Si T. Win
IPC: G06F11/273 , G06F11/263 , G06F11/22
CPC classification number: H04L1/242 , G06F11/076 , G06F11/2221 , G06F11/263 , G06F11/273 , G06F11/3027 , H04L43/0823 , H04L43/50 , H04L2001/0094
Abstract: Embodiments of the present disclosure provide apparatus for testing channel compliance. The apparatus generally performs operations that includes identifying at least one design criteria and determining boundary sets of frequency domain parameters for compliant signal channels known to achieve the design criteria. The boundary sets may be used for verifying whether a particular signal channel is compliant by comparing values of frequency domain parameters for the particular channel to one or more of the boundary sets of frequency domain parameters for the known compliant channels.
Abstract translation: 本公开的实施例提供了用于测试信道遵从性的装置。 该装置通常执行包括识别至少一个设计标准并且确定已知达到设计标准的合规信号通道的频域参数的边界集合的操作。 边界集可以用于通过将特定信道的频域参数的值与已知合规信道的频域参数的一个或多个边界集合进行比较来验证特定信号信道是否顺从。
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公开(公告)号：US20150276838A1
公开(公告)日：2015-10-01
申请号：US14228472
申请日：2014-03-28
Applicant: International Business Machines Corporation
Inventor： Jose A. Hejase , Nanju Na , Nam H. Pham , Lloyd A. Walls
IPC: G01R29/26
CPC classification number: G01R29/26 , G01R31/001 , G01R31/3187
Abstract: Functionality for estimating characteristics of an on-chip noise signal can be implemented on a processing module. An on-chip noise signal is determined at an on-chip determination point of a computer chip. The on-chip noise signal is converted to a frequency-varying signal using a voltage-controlled oscillator implemented on the computer chip. The frequency-varying signal is measured at an off-chip measurement point and frequency information is extracted from the frequency-varying signal. The frequency information is converted to a voltage level associated with the on-chip noise signal based on the relationship between an input voltage provided to the voltage-controlled oscillator and an output frequency generated by the voltage-controlled oscillator.
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公开(公告)号：US20230420394A1
公开(公告)日：2023-12-28
申请号：US17808221
申请日：2022-06-22
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Anil Yuksel , Jose A. Hejase , Junyan Tang , Pavel Roy Paladhi , Joshua Myers
IPC: H01L23/66 , H01L23/473 , H01P3/16
CPC classification number: H01L23/66 , H01L23/473 , H01P3/16 , H01L2223/6627
Abstract: A multi-chip package structure is provided. The multi-chip package structure includes a first IC chip and a second IC chip, and a fluid conduit thermally coupled to the first IC chip and the second IC chip. The multi-chip package structure is configured to remove heat generated by at least one of the first IC chip and the second IC chip. The fluid conduit has a first end and a second end opposite to the first end. The multi-chip package structure also includes a first monopole feed connected between the first IC chip and the first end of the fluid conduit, and a second monopole feed connected between the second IC chip and the second end of the fluid conduit. The first monopole feed is configured to transmit an electromagnetic signal through the fluid conduit toward the second monopole feed and vice versa.
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公开(公告)号：US10167879B2
公开(公告)日：2019-01-01
申请号：US15049033
申请日：2016-02-20
Applicant: International Business Machines Corporation
Inventor： Ethan E. Cruz , Jose A. Hejase , Howard V. Mahaney, Jr. , Joel Mendez
Abstract: Disclosed aspects relate to cooling electronics. A set of recirculation flaps is coupled with a cooling fan. At least one recirculation flap has a ferrous material. In various embodiments, the set of recirculation flaps is arranged in an open position in response to air pressure from the cooling fan, and is arranged in a closed position in response to substantially no air pressure from the cooling fan. A controller is coupled with the cooling fan. The controller indicates a set of indicated positions for the set of recirculation flaps based on a tachometer value. An electromagnet is connected with the controller to position the set of recirculation flaps in the set of indicated positions using the ferrous material. In various embodiments, the electromagnet engages the ferrous material to arrange the set of recirculation flaps in an open position.
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Patent Agency Ranking
公开(公告)号：US09686053B2
公开(公告)日：2017-06-20
申请号：US14833643
申请日：2015-08-24
Applicant: International Business Machines Corporation
Inventor： Wiren D. Becker , Daniel M. Dreps , Jose A. Hejase , Glen A. Wiedemeier , Si T. Win
IPC: G01R31/28 , H04L1/24 , G06F11/07 , G06F11/30 , G06F11/22 , G06F11/263 , G06F11/273 , H04L12/26
CPC classification number: H04L1/242 , G06F11/076 , G06F11/2221 , G06F11/263 , G06F11/273 , G06F11/3027 , H04L43/0823 , H04L43/50 , H04L2001/0094
Abstract: Embodiments of the present disclosure provide methods for testing channel compliance. The method generally includes identifying at least one design criteria and determining boundary sets of frequency domain parameters for compliant signal channels known to achieve the design criteria. The boundary sets may be used for verifying whether a particular signal channel is compliant by comparing values of frequency domain parameters for the particular channel to one or more of the boundary sets of frequency domain parameters for the known compliant channels.
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公开(公告)号：US20160349325A1
公开(公告)日：2016-12-01
申请号：US14833409
申请日：2015-08-24
Applicant: International Business Machines Corporation
Inventor： Wiren D. Becker , Daniel M. Dreps , Jose A. Hejase , Glen A. Wiedemeier , Si T. Win
IPC: G01R31/317 , G01R31/3177
CPC classification number: G01R31/31703 , G01R31/3177 , G06F13/4282
Abstract: Embodiments of the present disclosure provide methods for using a compliance model to determine compatibility of a channel with a bus's chip I/O circuitry at its ends. The method includes identifying at least one design criteria and obtaining boundary sets of frequency domain parameters for compliant signal channels known to achieve the design criteria. In certain embodiments, the boundary sets may be derived using a genetic algorithm. The method further includes verifying whether a particular signal channel is compliant by comparing values of frequency domain parameters for the particular channel to one or more of the boundary sets of frequency domain parameters for the known compliant channels.
Abstract translation: 本公开的实施例提供了使用符合性模型来确定信道与总线的芯片I / O电路在其端部的兼容性的方法。 该方法包括识别至少一个设计标准并获得已知达到设计标准的合格信号通道的频域参数的边界集合。 在某些实施例中，边界集可以使用遗传算法导出。 该方法还包括通过将特定信道的频域参数的值与已知的兼容信道的频域参数的一个或多个边界集合进行比较来验证特定信号信道是否顺从。
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公开(公告)号：US20150276840A1
公开(公告)日：2015-10-01
申请号：US14299257
申请日：2014-06-09
Applicant: International Business Machines Corporation
Inventor： Jose A. Hejase , Nanju Na , Nam H. Pham , Lloyd A. Walls
IPC: G01R29/26
CPC classification number: G01R29/26 , G01R31/001 , G01R31/3187
Abstract: Functionality for estimating characteristics of an on-chip noise signal can be implemented on a processing module. An on-chip noise signal is determined at an on-chip determination point of a computer chip. The on-chip noise signal is converted to a frequency-varying signal using a voltage-controlled oscillator implemented on the computer chip. The frequency-varying signal is measured at an off-chip measurement point and frequency information is extracted from the frequency-varying signal. The frequency information is converted to a voltage level associated with the on-chip noise signal based on the relationship between an input voltage provided to the voltage-controlled oscillator and an output frequency generated by the voltage-controlled oscillator.
Abstract translation: 用于估计片上噪声信号的特性的功能可以在处理模块上实现。 在计算机芯片的片上确定点处确定片上噪声信号。 使用在计算机芯片上实现的压控振荡器将片上噪声信号转换为频率变化信号。 在片外测量点测量频率变化信号，并从频率变化信号中提取频率信息。 基于提供给压控振荡器的输入电压与由压控振荡器产生的输出频率之间的关系，频率信息被转换为与片上噪声信号相关联的电压电平。
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公开(公告)号：US20210112655A1
公开(公告)日：2021-04-15
申请号：US16600795
申请日：2019-10-14
Applicant: International Business Machines Corporation
Inventor： Pavel ROY PALADHI , Jose A. Hejase , Junyan Tang , Joshua C. Myers , Sungjun Chun , Wiren D. Becker , Daniel M. Dreps
Abstract: A printed circuit board (‘PCB’) including a substrate integrated waveguide (‘SIW’) formed using two ground planes representing the top and bottom walls of the waveguide, tightly pitched ground vias to act as two side walls and two back walls, and a pair of monopole antennas placed at each end of the SIW acting as signal feeding/receiving structures is disclosed. The waveguide dominant mode cut off frequency is determined by the spacing between the two side walls. Within each monopole antenna pair, the first monopole antenna operates at a first frequency while the second monopole antenna operates at another frequency. For each monopole antenna pair, the first monopole antenna and the second monopole antenna are located in the SIW at a distance from the back wall optimal for each operating frequency.
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公开(公告)号：US10199706B2
公开(公告)日：2019-02-05
申请号：US15331614
申请日：2016-10-21
Applicant: International Business Machines Corporation
Inventor： Samuel R. Connor , Daniel M. Dreps , Jose A. Hejase , Joseph Kuczynski , Joshua C. Myers , Junyan Tang
Abstract: Embodiments herein describe a high-speed communication channel in a PCB that includes a dielectric waveguide sandwiched between two ground layers. The dielectric waveguide includes a core and a cladding where the material of the core has a higher dielectric constant than the material of the cladding. Thus, electromagnetic signals propagating in the core are internally reflected at the interface between the core and cladding such that the electromagnetic signals are primary contained in the core.
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