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公开(公告)号:US11687065B2
公开(公告)日:2023-06-27
申请号:US17132715
申请日:2020-12-23
Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Inventor: Shau-Yin Tseng , Jian-Wei Chen
IPC: G05B19/418 , G06T7/00 , G03F7/20 , G03F7/00 , G06N7/01
CPC classification number: G05B19/41885 , G03F7/70433 , G05B19/4183 , G05B19/4188 , G06N7/01 , G06T7/0004
Abstract: A method for generating and updating position distribution graph comprises: generating a position distribution graph according to a circuit bitmap and an exposure pattern, performing an exposure simulation according to the position distribution graph to generate an exposure result graph, comparing the circuit bitmap with the exposure result graph to generate a plurality of error distribution candidate graphs, selecting one of the error distribution candidate graphs to serve as an error distribution graph, and performing a zero-one integer programming to update the position distribution graph according to the circuit bitmap and the error distribution graph, wherein the updated position distribution graph is associated with the error distribution graph.
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公开(公告)号:US20160148335A1
公开(公告)日:2016-05-26
申请号:US14551089
申请日:2014-11-24
Applicant: Industrial Technology Research Institute
Inventor: Hsu-Yao Huang , I-Hsuan Lu , Tai-Hua Lu , Shau-Yin Tseng , Juin-Ming Lu
CPC classification number: G06T1/20
Abstract: A data-processing apparatus and an operation method thereof are provided. The data-processing apparatus includes a tiling circuit and a post-stage processing circuit. The tiling circuit is configured to receive input data. The tiling circuit divides a current frame of the input data into at least one tile and checks a motion state of the current tile in the at least one tile. The post-stage processing circuit is coupled to the tiling circuit to receive the current tile. The post-stage processing circuit performs post processing on the current tile to generate a processed current tile of the current frame or to obtain a processed corresponding tile of a previous frame and serves it as the processed current tile of the current frame, according to the motion state of the current tile.
Abstract translation: 提供了一种数据处理装置及其操作方法。 数据处理装置包括平铺电路和后级处理电路。 拼接电路被配置为接收输入数据。 平铺电路将输入数据的当前帧划分成至少一个瓦片,并检查至少一个瓦片中当前瓦片的运动状态。 后级处理电路耦合到平铺电路以接收当前瓦片。 后级处理电路对当前片进行后处理以产生当前帧的经处理的当前片,或者获得前一帧的经处理的对应片,并将其作为当前帧的被处理当前片,并根据 当前瓦片的运动状态。
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公开(公告)号:US09305326B2
公开(公告)日:2016-04-05
申请号:US14141191
申请日:2013-12-26
Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Inventor: Tsung-Ling Hwang , Shau-Yin Tseng , Tai-Hua Lu
CPC classification number: G06T1/20 , G06T15/005
Abstract: An exemplary embodiment describes a method for tile elimination, including: reading in data of a new tile; reading signature values corresponding to the new tile from a signature value repository; generating signature values for the new tile; comparing the read signature values and the generated signature values of the same tile to determine whether the two sets of signature values being identical; when the two sets of signature values being identical, copying the new tile directly from a tile frame buffer without rendering; otherwise, updating the signature value repository with the generated signature values replacing the stored signature values; rendering the tile; and updating the tile frame buffer with the newly rendered tile.
Abstract translation: 示例性实施例描述了一种用于瓦片消除的方法,包括:读取新瓦片的数据; 从签名值库读取对应于新瓦片的签名值; 生成新图块的签名值; 比较读取的签名值和生成的相同瓦片的签名值,以确定两组签名值是否相同; 当两组签名值相同时,直接从瓦片帧缓冲区复制新瓦片而不呈现; 否则,用所生成的签名值更新所述签名值库,以代替所存储的签名值; 渲染瓷砖; 以及用新渲染的瓦片更新瓦片帧缓冲器。
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公开(公告)号:US11372779B2
公开(公告)日:2022-06-28
申请号:US16425969
申请日:2019-05-30
Inventor: Che-Wei Tsao , Tei-Wei Kuo , Yuan-Hao Chang , Tzu-Chieh Shen , Shau-Yin Tseng
IPC: G06F12/12 , G06F12/123 , G06F12/1027
Abstract: A memory page management method is provided. The method includes receiving a state-change notification corresponding to a state-change page, and grouping the state-change page from a list to which the state-change page belongs into a keep list or an adaptive LRU list of an adaptive adjusting list according to the state-change notification; receiving an access command from a CPU to perform an access operation to target page data corresponding to a target page; determining that a cache hit state is a hit state or a miss state according to a target NVM page address corresponding to the target page, and grouping the target page into the adaptive LRU list according to the cache hit state; and searching the adaptive page list according to the target NVM page address to obtain a target DRAM page address to complete the access command corresponding to the target page data.
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公开(公告)号:US20190197374A1
公开(公告)日:2019-06-27
申请号:US16120467
申请日:2018-09-04
Applicant: Industrial Technology Research Institute
Inventor: Shau-Yin Tseng , Chien-Hung Lin , Yu-Sheng Lee , Yung-Chao Chen , Chih-Wei Hsu
CPC classification number: G06K15/4045 , G06K15/1836 , G06K15/1849 , H04N1/32251
Abstract: A method and a system for digital direct imaging, an image generating method and an electronic device are provided. The method for digital direct imaging includes: obtaining a first image of a first format; converting the first image into a second image of a second format, wherein the second image includes a contour description; generating a correction parameter according to at least one mark on a substrate; correcting the second image according to the contour description and the correction parameter; and performing a rasterization operation on the corrected second image and imaging the second image processed by the rasterization operation on the substrate by an exposure device.
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公开(公告)号:US11341628B2
公开(公告)日:2022-05-24
申请号:US16853607
申请日:2020-04-20
Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Inventor: Shau-Yin Tseng , Yan-Jen Su , Jin-Nan Liu , Chien-Wei Chen
Abstract: A method for compensating a design image of a workpiece and a system for processing the design image of the workpiece are disclosed. The method includes the following steps. Obtaining a real image of the workpiece, with the real image having registration holes. Calculating a slope value for each of the registration holes. Determining an amount of interpolation points between each two neighboring registration holes of the registration holes according to the slope value corresponding to each of the registration holes. Obtaining positions of control points in blocks formed by the registration holes. Compensating the design image of the workpiece according to positions of the registration holes, positions of the plurality of interpolation points and the positions of the control points for generating a mapping image. Outputting the mapping image adapted to be mapped onto the workpiece. The system, together with the method, will be introduced.
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7.
公开(公告)号:US10909431B2
公开(公告)日:2021-02-02
申请号:US16120467
申请日:2018-09-04
Applicant: Industrial Technology Research Institute
Inventor: Shau-Yin Tseng , Chien-Hung Lin , Yu-Sheng Lee , Yung-Chao Chen , Chih-Wei Hsu
Abstract: A method and a system for digital direct imaging, an image generating method and an electronic device are provided. The method for digital direct imaging includes: obtaining a first image of a first format; converting the first image into a second image of a second format, wherein the second image includes a contour description; generating a correction parameter according to at least one mark on a substrate; correcting the second image according to the contour description and the correction parameter; and performing a rasterization operation on the corrected second image and imaging the second image processed by the rasterization operation on the substrate by an exposure device.
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公开(公告)号:US10274833B2
公开(公告)日:2019-04-30
申请号:US15608928
申请日:2017-05-30
Applicant: Industrial Technology Research Institute
Inventor: Ka-Yi Yeh , Chun-Lung Lin , Shau-Yin Tseng
Abstract: An exposing method adapted to a maskless photolithography process. The exposing method includes reading an exposure file; obtaining a plurality of coordinate information corresponding to a plurality of patterns contained in the exposure file, according to the exposure file; generating graphical data, according to the plurality of coordinate information; generating scanning data corresponding to each of a plurality of polygon mirrors or each of at least one polygon mirror group, according to the graphical data and a configuration of the polygon mirrors, wherein every two rotation directions of every two adjacent polygon mirrors of the plurality of polygon mirrors are different, or every two rotation directions of every two adjacent polygon mirrors of the at least one polygon mirror group are different.
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公开(公告)号:US20180196355A1
公开(公告)日:2018-07-12
申请号:US15608928
申请日:2017-05-30
Applicant: Industrial Technology Research Institute
Inventor: Ka-Yi Yeh , Chun-Lung Lin , Shau-Yin Tseng
CPC classification number: G03F7/70383 , G02B26/124 , G02B26/127 , G03F7/70275 , G03F7/70291 , G03F7/70508
Abstract: An exposing method adapted to a maskless photolithography process. The exposing method includes reading an exposure file; obtaining a plurality of coordinate information corresponding to a plurality of patterns contained in the exposure file, according to the exposure file; generating graphical data, according to the plurality of coordinate information; generating scanning data corresponding to each of a plurality of polygon mirrors or each of at least one polygon mirror group, according to the graphical data and a configuration of the polygon mirrors, wherein every two rotation directions of every two adjacent polygon mirrors of the plurality of polygon mirrors are different, or every two rotation directions of every two adjacent polygon mirrors of the at least one polygon mirror group are different.
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公开(公告)号:US09626733B2
公开(公告)日:2017-04-18
申请号:US14551089
申请日:2014-11-24
Applicant: Industrial Technology Research Institute
Inventor: Hsu-Yao Huang , I-Hsuan Lu , Tai-Hua Lu , Shau-Yin Tseng , Juin-Ming Lu
IPC: G06T1/20
CPC classification number: G06T1/20
Abstract: A data-processing apparatus and an operation method thereof are provided. The data-processing apparatus includes a tiling circuit and a post-stage processing circuit. The tiling circuit is configured to receive input data. The tiling circuit divides a current frame of the input data into at least one tile and checks a motion state of the current tile in the at least one tile. The post-stage processing circuit is coupled to the tiling circuit to receive the current tile. The post-stage processing circuit performs post processing on the current tile to generate a processed current tile of the current frame or to obtain a processed corresponding tile of a previous frame and serves it as the processed current tile of the current frame, according to the motion state of the current tile.
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