LOCATION INFORMATION DECISION METHOD IN INTEGRATED TERMINAL
    1.
    发明申请
    LOCATION INFORMATION DECISION METHOD IN INTEGRATED TERMINAL 审中-公开
    位置信息综合终端的决策方法

    公开(公告)号:US20120062415A1

    公开(公告)日:2012-03-15

    申请号:US13020163

    申请日:2011-02-03

    IPC分类号: G01S19/46

    CPC分类号: G01S19/48 G01S5/021

    摘要: Provided is a method of efficiently determining a location of a terminal. The method includes receiving both of a GPS signal and a mobile communication signal. When the GPS signal is not received, a location calculated using the mobile communication signal is determined as the location of the terminal.

    摘要翻译: 提供了一种有效地确定终端的位置的方法。 该方法包括接收GPS信号和移动通信信号。 当没有接收到GPS信号时,使用移动通信信号计算的位置被确定为终端的位置。

    AUTO GAIN CONTROL METHOD IN DIGITAL COMMUNICATION SYSTEM
    3.
    发明申请
    AUTO GAIN CONTROL METHOD IN DIGITAL COMMUNICATION SYSTEM 失效
    数字通信系统中的自动增益控制方法

    公开(公告)号:US20100158167A1

    公开(公告)日:2010-06-24

    申请号:US12543815

    申请日:2009-08-19

    IPC分类号: H04L27/08 H04B1/06

    CPC分类号: H03G3/3089

    摘要: Provided is an auto gain control method in a digital communication system. The auto gain control method checks a distribution of a signal and a distribution of a signal envelope during a regular check interval, and determines a state of a current gain value from the distribution of the signal and the distribution of the signal envelope which are obtained through the checking of the distribution. The auto gain control method controls a gain value for auto gain control according to the determined state of the current gain value.

    摘要翻译: 提供了一种数字通信系统中的自动增益控制方法。 自动增益控制方法在常规检查间隔期间检查信号的分布和信号包络的分布,并根据信号的分布和信号包络的分布来确定当前增益值的状态 检查分配。 自动增益控制方法根据当前增益值的确定状态来控制自动增益控制的增益值。

    DERATE MATCHING METHOD AND APPARATUS
    4.
    发明申请
    DERATE MATCHING METHOD AND APPARATUS 有权
    DERATE匹配方法和设备

    公开(公告)号:US20100158053A1

    公开(公告)日:2010-06-24

    申请号:US12544645

    申请日:2009-08-20

    IPC分类号: H04J3/04

    摘要: Provided are a method and apparatus for derate matching a rate-matched data. The received data is deinterleaved and derate matched at a time, without using input buffers or constructing input buffers in parallel. Thus, a total process time necessary for the deinterleaving process and the derate matching process is reduced, and the use of memories such as the input buffers is minimized.

    摘要翻译: 提供了一种降低匹配速率匹配数据的方法和装置。 接收到的数据一次被解交错和降额匹配,而不使用输入缓冲器或并行构建输入缓冲器。 因此,减少解交织处理和降额匹配处理所需的总处理时间,并且使诸如输入缓冲器的存储器的使用最小化。

    RANDOM ACCESS METHOD FOR MACHINE TYPE COMMUNICATION TERMINAL
    5.
    发明申请
    RANDOM ACCESS METHOD FOR MACHINE TYPE COMMUNICATION TERMINAL 审中-公开
    机器类型通信终端的随机访问方法

    公开(公告)号:US20160242211A1

    公开(公告)日:2016-08-18

    申请号:US14620361

    申请日:2015-02-12

    摘要: Disclosed is a random access method for a machine type communication (MTC) terminal. The random access method performed by a terminal includes performing a cell search, determining a radio environment based on time taken to perform the cell search, and performing different random access procedures depending on the determined radio environment. Accordingly, coverage of the MTC terminal that is in a poor radio environment may be enhanced, thereby performing normal communication with a base station.

    摘要翻译: 公开了一种用于机器型通信(MTC)终端的随机接入方法。 由终端执行的随机接入方法包括执行小区搜索,基于执行小区搜索所花费的时间来确定无线电环境,以及根据确定的无线电环境执行不同的随机接入过程。 因此,可以增强处于恶劣的无线环境中的MTC终端的覆盖,从而与基站进行正常的通信。

    RATE MATCHING APPARATUS AND RATE MATCHING METHOD THEREOF
    6.
    发明申请
    RATE MATCHING APPARATUS AND RATE MATCHING METHOD THEREOF 有权
    速率匹配装置和速率匹配方法

    公开(公告)号:US20120069915A1

    公开(公告)日:2012-03-22

    申请号:US13020143

    申请日:2011-02-03

    IPC分类号: H04L27/00

    CPC分类号: H04L1/0067 H04L1/0071

    摘要: Provided is a rate matching apparatus. The rate matching apparatus includes interleavers, dummy bit removers, a bit collector, a memory and a selector. The interleavers interleave code blocks, respectively. The dummy bit removers remove dummy bits of the interleaved code blocks, respectively. The bit collector collects code blocks with the dummy bits removed by bit units, and divides a collected data bit stream into systematic data and parity data. The memory stores the systematic data and the parity data in parallel. The selector outputs in parallel a plurality of data bits which are selected from the systematic data and parity data of the memory.

    摘要翻译: 提供了一种速率匹配装置。 速率匹配装置包括交织器,伪位去除器,位收集器,存储器和选择器。 交织器分别交替代码块。 虚拟位去除器分别去除交织代码块的虚拟位。 位收集器采集通过位单元去除虚拟位的代码块,并将收集的数据位流分成系统数据和奇偶校验数据。 存储器并行地存储系统数据和奇偶校验数据。 选择器并行输出从存储器的系统数据和奇偶校验数据中选择的多个数据位。