ELECTRONIC APPARATUS AND IMAGE PROCESSING METHOD OF ELECTRONIC APPARATUS

    公开(公告)号:US20230214955A1

    公开(公告)日:2023-07-06

    申请号:US18184659

    申请日:2023-03-16

    CPC classification number: G06T1/20

    Abstract: Embodiments of this disclosure provide an electronic apparatus and an image processing method of the electronic apparatus. The electronic apparatus includes: an artificial intelligence (AI) processor, configured to perform first image signal processing on a first image signal to obtain a second image signal, where the first image signal is obtained based on image data output by an image sensor; and an image signal processor (ISP), configured to perform second image signal processing on the second image signal to obtain an image processing result. In this way, image processing can be flexibly performed by the ISP in combination with the AI processor, and the image processing result is improved.

    Image transmission method and apparatus

    公开(公告)号:US12167004B2

    公开(公告)日:2024-12-10

    申请号:US17897808

    申请日:2022-08-29

    Abstract: Embodiments of this application provide an image transmission method and apparatus. The method includes: converting a first high-resolution image into a first low-resolution image, where first resolution of the first high-resolution image is higher than second resolution of the first low-resolution image; encoding the first low-resolution image to obtain a first bitstream; obtaining a second high-resolution image, where third resolution of the second high-resolution image is higher than the second resolution, and the second high-resolution image includes high-frequency information of the first high-resolution image and excludes low-frequency information of the first high-resolution image; obtaining an image residual between the first high-resolution image and the second high-resolution image, where the image residual is used to reflect the low-frequency information of the first high-resolution image; encoding the image residual to obtain a second bitstream; and sending the first bitstream and the second bitstream.

    OPERATION METHOD AND SECURITY CHIP
    4.
    发明申请

    公开(公告)号:US20190173665A1

    公开(公告)日:2019-06-06

    申请号:US16258114

    申请日:2019-01-25

    Abstract: Embodiments of the present application disclose an operation method. The method includes: obtaining, by the input/output interface, an input ciphertext; performing, by the decryption circuit, a modular exponentiation operation according to the ciphertext and a preset operation parameter; and using, by the microprocessor, an operation result obtained after the modular exponentiation operation as a plaintext obtained after decryption. The performing, by the decryption circuit, a modular exponentiation operation according to the ciphertext and a preset operation parameter is specifically: breaking, by the decryption circuit, the modular exponentiation operation into multiple iterative first operations, where the first operation is a modular square operation or a modular multiplication operation; sending, by the decryption circuit, the ciphertext and the operation parameter to the arithmetic unit; and performing, by the arithmetic unit, the first operation according to the ciphertext and the operation parameter to obtain a modular square value or a modular multiplication value

    Operation method and security chip

    公开(公告)号:US10601577B2

    公开(公告)日:2020-03-24

    申请号:US16258114

    申请日:2019-01-25

    Abstract: Embodiments of the present application disclose an operation method. The method includes: obtaining, by the input/output interface, an input ciphertext; performing, by the decryption circuit, a modular exponentiation operation according to the ciphertext and a preset operation parameter; and using, by the microprocessor, an operation result obtained after the modular exponentiation operation as a plaintext obtained after decryption. The performing, by the decryption circuit, a modular exponentiation operation according to the ciphertext and a preset operation parameter is specifically: breaking, by the decryption circuit, the modular exponentiation operation into multiple iterative first operations, where the first operation is a modular square operation or a modular multiplication operation; sending, by the decryption circuit, the ciphertext and the operation parameter to the arithmetic unit; and performing, by the arithmetic unit, the first operation according to the ciphertext and the operation parameter to obtain a modular square value or a modular multiplication value.

    MOBILE PAYMENT METHOD, SYSTEM ON CHIP, AND TERMINAL

    公开(公告)号:US20190139026A1

    公开(公告)日:2019-05-09

    申请号:US16235270

    申请日:2018-12-28

    Abstract: This application relates to the field of communications technologies, and discloses a mobile payment method. The method is applied to a system on chip SOC, where the SOC includes a secure element SE integrated into the SOC, and the method includes: receiving, by the SE, a transaction request; obtaining, by the SE, a first check value from an external memory; performing a security check on the external memory according to the first check value and a second check value that is stored locally in the SOC; and if the external memory passes the security check, obtaining, by the SE, first transaction data from the external memory, and processing the transaction request based on the first transaction data. This application is applied to a mobile payment process.

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