公开(公告)号：US07423561B2

公开(公告)日：2008-09-09

申请号：US11758655

申请日：2007-06-05

申请人： Hsin-Cheng Chen ,  Pi-Hai Liu ,  Ming-Yang Chao

发明人： Hsin-Cheng Chen ,  Pi-Hai Liu ,  Ming-Yang Chao

IPC分类号： H03M7/00

CPC分类号： G11B20/1426 ,  G11B2020/1442 ,  G11B2020/1457 ,  G11B2220/2541 ,  G11B2220/2579 ,  H03M5/145

摘要： A modulation method for symbols in a frame of a compact disc includes the steps of receiving a plurality of data words, modulating each data word into a code word of a corresponding data symbol, and providing a plurality of combinations of potential merge bits to be inserted between successive symbols of the frame. At least one combination of candidate merge bits is generated according to the plurality of combinations of potential merge bits, a data symbol immediately preceding the location of the candidate merge bits, and a data symbol immediately succeeding the location of the candidate merge bits. The combination of candidate merge bits which minimizes (optimizes) the absolute cumulative DSV is selected when a subsequent group of possible combinations of candidate merge bits is detected or after a predetermined delay, and the selected combination of candidate merge bits is inserted between the two successive data symbols.

摘要翻译： 在光盘的帧中的符号的调制方法包括以下步骤：接收多个数据字，将每个数据字调制成相应数据符号的码字，并提供要插入的潜在合并位的多个组合 在帧的连续符号之间。 根据潜在的合并位，候选合并位的位置之前的数据符号以及候选合并位的位置之后的数据符号的多个组合，生成候选合并位的至少一个组合。 当检测到候选合并比特的可能组合的后续组或者在预定的延迟之后，选择最小化（优化）绝对累积DSV的候选合并比特的组合，并且将所选择的候选合并比特的组合插入在两个连续的 数据符号。

公开(公告)号：US07397396B2

公开(公告)日：2008-07-08

申请号：US11550420

申请日：2006-10-18

申请人： Hsin-Cheng Chen ,  Pi-Hai Liu ,  Ming-Yang Chao

发明人： Hsin-Cheng Chen ,  Pi-Hai Liu ,  Ming-Yang Chao

IPC分类号： H03M5/00

CPC分类号： G11B20/1426 ,  G11B2020/1288 ,  G11B2020/1442 ,  G11B2020/1453 ,  G11B2020/1457 ,  G11B2220/2541 ,  G11B2220/2579

摘要： A modulation system includes an encoder for transferring data words to tentative code words. A DSV control bit generator determines the value of a DSV control bit according to the data words or the tentative code words to optimize the cumulative DSVs corresponding tentative code words, wherein the DSV control bit generator determines the value of a current DSV control bit when at least a subsequent DSV control bit is detected. A final code word generator generates final code words according to the determined DSV control bit and the tentative code words.

摘要翻译： 调制系统包括用于将数据字传送到临时码字的编码器。 DSV控制位发生器根据数据字或暂定码字来确定DSV控制位的值，以优化对应的暂定码字的累积DSV，其中DSV控制位发生器确定当当前DSV控制位的值在 至少检测到随后的DSV控制位。 最终码字发生器根据确定的DSV控制位和暂定码字产生最终码字。

公开(公告)号：US20070229327A1

公开(公告)日：2007-10-04

申请号：US11758655

申请日：2007-06-05

申请人： Hsin-Cheng Chen ,  Pi-Hai Liu ,  Ming-Yang Chao

发明人： Hsin-Cheng Chen ,  Pi-Hai Liu ,  Ming-Yang Chao

IPC分类号： H03M3/00

CPC分类号： G11B20/1426 ,  G11B2020/1442 ,  G11B2020/1457 ,  G11B2220/2541 ,  G11B2220/2579 ,  H03M5/145

摘要： A modulation method for symbols in a frame of a compact disc includes the steps of receiving a plurality of data words, modulating each data word into a code word of a corresponding data symbol, and providing a plurality of combinations of potential merge bits to be inserted between successive symbols of the frame. At least one combination of candidate merge bits is generated according to the plurality of combinations of potential merge bits, a data symbol immediately preceding the location of the candidate merge bits, and a data symbol immediately succeeding the location of the candidate merge bits. The combination of candidate merge bits which minimizes (optimizes) the absolute cumulative DSV is selected when a subsequent group of possible combinations of candidate merge bits is detected or after a predetermined delay, and the selected combination of candidate merge bits is inserted between the two successive data symbols.

摘要翻译： 在光盘的帧中的符号的调制方法包括以下步骤：接收多个数据字，将每个数据字调制成相应数据符号的码字，并提供要插入的潜在合并位的多个组合 在帧的连续符号之间。 根据潜在的合并位，候选合并位的位置之前的数据符号以及候选合并位的位置之后的数据符号的多个组合来生成候选合并位的至少一个组合。 当检测到候选合并比特的可能组合的后续组或者在预定的延迟之后，选择最小化（优化）绝对累积DSV的候选合并比特的组合，并且将所选择的候选合并比特的组合插入在两个连续的 数据符号。

公开(公告)号：US20070080836A1

公开(公告)日：2007-04-12

申请号：US11550420

申请日：2006-10-18

申请人： Hsin-Cheng Chen ,  Pi-Hai Liu ,  Ming-Yang Chao

发明人： Hsin-Cheng Chen ,  Pi-Hai Liu ,  Ming-Yang Chao

IPC分类号： H03M3/00

CPC分类号： G11B20/1426 ,  G11B2020/1288 ,  G11B2020/1442 ,  G11B2020/1453 ,  G11B2020/1457 ,  G11B2220/2541 ,  G11B2220/2579

摘要： A modulation system includes an encoder for transferring data words to tentative code words. A DSV control bit generator determines the value of a DSV control bit according to the data words or the tentative code words to optimize the cumulative DSVs corresponding tentative code words, wherein the DSV control bit generator determines the value of a current DSV control bit when at least a subsequent DSV control bit is detected. A final code word generator generates final code words according to the determined DSV control bit and the tentative code words.

摘要翻译： 调制系统包括用于将数据字传送到临时码字的编码器。 DSV控制位发生器根据数据字或暂定码字来确定DSV控制位的值，以优化对应的暂定码字的累积DSV，其中DSV控制位发生器确定当当前DSV控制位的值在 至少检测到随后的DSV控制位。 最终码字发生器根据确定的DSV控制位和暂定码字产生最终码字。

公开(公告)号：US07142135B1

公开(公告)日：2006-11-28

申请号：US11162323

申请日：2005-09-06

申请人： Hsin-Cheng Chen ,  Pi-Hai Liu ,  Ming-Yang Chao

发明人： Hsin-Cheng Chen ,  Pi-Hai Liu ,  Ming-Yang Chao

IPC分类号： H03M7/00

CPC分类号： G11B20/1426 ,  G11B2020/1288 ,  G11B2020/1442 ,  G11B2020/1453 ,  G11B2020/1457 ,  G11B2220/2541 ,  G11B2220/2579

摘要： In a high-density optical storage system, data words are modulated into code words in a manner of minimizing the fluctuation of the digital sum value (DSV). A cumulative DSV is calculated for each possible value of a DSV control bit. The DSV control bit is determined to minimize the absolute cumulative DSV when detecting at least one subsequent DSV control bit or after a predetermined delay. A corresponding code word is generated according to the determined current DSV control bit.

摘要翻译： 在高密度光存储系统中，以使数字和值（DSV）的波动最小化的方式将数据字调制成码字。 针对DSV控制位的每个可能值计算累积DSV。 确定DSV控制位以在检测至少一个后续DSV控制位时或在预定延迟之后最小化绝对累积DSV。 根据确定的当前DSV控制位产生相应的代码字。

公开(公告)号：US07348900B1

公开(公告)日：2008-03-25

申请号：US11308095

申请日：2006-03-07

申请人： Pi-Hai Liu ,  Ming-Yang Chao ,  Jin-Bin Yang

发明人： Pi-Hai Liu ,  Ming-Yang Chao ,  Jin-Bin Yang

IPC分类号： H03M5/00

CPC分类号： H03M5/145 ,  G11B20/10 ,  H03M7/14

摘要： A modulation method for a first data string having a plurality of symbols is disclosed. The method includes: appending a data string to the first data string to form a second data string; and converting the second data string to a code word sequence by converting each of the symbols in the first data string to a code word according to predetermined modulation rules and a symbol set selected from the second data string. Each code word has a first fixed number of bits, each symbol has a second fixed number of bits, and each symbol set has a fixed number of symbols.

摘要翻译： 公开了一种具有多个符号的第一数据串的调制方法。 该方法包括：将数据串附加到第一数据串以形成第二数据串; 以及通过根据预定的调制规则和从第二数据串中选择的符号集将第一数据串中的每个符号转换为码字，将第二数据串转换为码字序列。 每个码字具有第一固定数量的比特，每个符号具有第二固定数量的比特，并且每个符号集具有固定数目的符号。

公开(公告)号：US08050151B2

公开(公告)日：2011-11-01

申请号：US11106609

申请日：2005-04-15

申请人： Pi-Hai Liu ,  Chun-Nan Chen

发明人： Pi-Hai Liu ,  Chun-Nan Chen

IPC分类号： G11B17/22

CPC分类号： G11B5/59605 ,  G11B5/5526 ,  G11B2220/2541

摘要： An address-accessing device includes first and second information generators for producing first and second information according to the received address signals; a phase offset detector for producing a phase offset according to the first and second information; a reference signal generator for producing a reference signal according to the phase offset, the first information and the second information; and a decoder used to determine the structure type of an address-in-pregroove unit (ADIP) according to the reference value. This address-accessing device is capable of adjusting the decision level and the phase offset automatically to lower the error rate occurring in the address access procedure.

摘要翻译： 地址访问装置包括根据接收到的地址信号产生第一和第二信息的第一和第二信息发生器; 相位偏移检测器，用于根据第一和第二信息产生相位偏移; 参考信号发生器，用于根据相位偏移产生参考信号，第一信息和第二信息; 以及用于根据参考值确定预输入地址单元（ADIP）的结构类型的解码器。 该地址访问装置能够自动调整判定级别和相位偏移，以降低在地址访问过程中发生的错误率。

公开(公告)号：US20110090779A1

公开(公告)日：2011-04-21

申请号：US12703874

申请日：2010-02-11

申请人： Chih-Ching Yu ,  Yu-Hsuan Lin ,  Pi-Hai Liu

发明人： Chih-Ching Yu ,  Yu-Hsuan Lin ,  Pi-Hai Liu

IPC分类号： G11B20/10

CPC分类号： H03M13/41 ,  G11B20/10009 ,  G11B20/10027 ,  G11B20/10046 ,  G11B20/10296 ,  G11B2220/2537 ,  H03M13/3707 ,  H03M13/6343

摘要： The invention discloses an apparatus for generating a Viterbi-processed data using an input signal obtained from an optical disk, including a Viterbi module and a binary signal enhancing module. The Viterbi module is configured to process the input signal according to a binary signal. The binary signal enhancing module is configured to boost the input signal and generate the binary signal accordingly.

摘要翻译： 本发明公开了一种使用从包括维特比模块和二进制信号增强模块的光盘获得的输入信号产生维特比处理数据的装置。 维特比模块被配置为根据二进制信号处理输入信号。 二进制信号增强模块被配置为升高输入信号并相应地生成二进制信号。

公开(公告)号：US20090296545A1

公开(公告)日：2009-12-03

申请号：US12129666

申请日：2008-05-29

申请人： Yu-Hsuan Lin ,  Shu-Hung Chou ,  Pi-Hai Liu

发明人： Yu-Hsuan Lin ,  Shu-Hung Chou ,  Pi-Hai Liu

IPC分类号： G11B20/00

CPC分类号： G11B20/1403 ,  G11B7/0053 ,  G11B20/10037 ,  G11B20/10222 ,  G11B20/10425 ,  G11B20/1217 ,  G11B2020/1239 ,  G11B2020/1268 ,  G11B2220/2541

摘要： An apparatus and method for demodulating an input signal modulated from a reference signal and a data signal are disclosed. The apparatus includes a determining unit, a first calculating unit, and a comparing unit. The determining unit is utilized for determining a plurality of first calculating timings of changing different calculating modes according to the input signal. The first calculating unit is coupled to the determining unit and utilized for generating a first calculating result of the input signal according to the first calculating timings and the calculating modes thereof. The comparing unit is coupled to the first calculating unit and utilized for generating a comparing result according to the first calculating result of the input signal and a threshold setting, and for outputting a demodulated data of the input signal according to the comparing result.

摘要翻译： 公开了一种用于解调从参考信号和数据信号调制的输入信号的装置和方法。 该装置包括确定单元，第一计算单元和比较单元。 确定单元用于根据输入信号确定改变不同计算模式的多个第一计算定时。 第一计算单元耦合到确定单元，用于根据第一计算定时及其计算模式产生输入信号的第一计算结果。 比较单元耦合到第一计算单元，用于根据输入信号的第一计算结果和阈值设置产生比较结果，并且用于根据比较结果输出输入信号的解调数据。

公开(公告)号：US07583729B2

公开(公告)日：2009-09-01

申请号：US11161532

申请日：2005-08-08

申请人： Pi-Hai Liu ,  Meng-Ta Yang

发明人： Pi-Hai Liu ,  Meng-Ta Yang

IPC分类号： H03K5/159 ,  H03D1/00

CPC分类号： H04B3/142

摘要： An adaptive equalizer and the related method are disclosed. The adaptive equalizer is capable of adjusting its own equalization coefficients, and includes a reference signal generator for generating a reference signal according to a first reference source, an equalization unit for generating an equalized signal by processing a received signal through a plurality of equalization coefficients, a weighted signal generator for generating a weighted signal according to a second reference source, and a coefficient adapting circuit for adjusting the equalization coefficients according to the reference signal, the equalized signal, the weighted signal, and the received signal.

摘要翻译： 公开了一种自适应均衡器及相关方法。 自适应均衡器能够调整其自身的均衡系数，并且包括用于根据第一参考源产生参考信号的参考信号发生器，用于通过多个均衡系数处理接收信号来产生均衡信号的均衡单元， 用于根据第二参考源产生加权信号的加权信号发生器，以及根据参考信号，均衡信号，加权信号和接收信号调整均衡系数的系数适配电路。