Method and apparatus for encoding/decoding in fixed length
    1.
    发明授权
    Method and apparatus for encoding/decoding in fixed length 有权
    固定长度编码/解码的方法和装置

    公开(公告)号:US07348900B1

    公开(公告)日:2008-03-25

    申请号:US11308095

    申请日:2006-03-07

    CPC classification number: H03M5/145 G11B20/10 H03M7/14

    Abstract: A modulation method for a first data string having a plurality of symbols is disclosed. The method includes: appending a data string to the first data string to form a second data string; and converting the second data string to a code word sequence by converting each of the symbols in the first data string to a code word according to predetermined modulation rules and a symbol set selected from the second data string. Each code word has a first fixed number of bits, each symbol has a second fixed number of bits, and each symbol set has a fixed number of symbols.

    Abstract translation: 公开了一种具有多个符号的第一数据串的调制方法。 该方法包括:将数据串附加到第一数据串以形成第二数据串; 以及通过根据预定的调制规则和从第二数据串中选择的符号集将第一数据串中的每个符号转换为码字,将第二数据串转换为码字序列。 每个码字具有第一固定数量的比特,每个符号具有第二固定数量的比特,并且每个符号集具有固定数目的符号。

    Modulation methods and systems
    2.
    发明授权
    Modulation methods and systems 有权
    调制方法和系统

    公开(公告)号:US07423561B2

    公开(公告)日:2008-09-09

    申请号:US11758655

    申请日:2007-06-05

    Abstract: A modulation method for symbols in a frame of a compact disc includes the steps of receiving a plurality of data words, modulating each data word into a code word of a corresponding data symbol, and providing a plurality of combinations of potential merge bits to be inserted between successive symbols of the frame. At least one combination of candidate merge bits is generated according to the plurality of combinations of potential merge bits, a data symbol immediately preceding the location of the candidate merge bits, and a data symbol immediately succeeding the location of the candidate merge bits. The combination of candidate merge bits which minimizes (optimizes) the absolute cumulative DSV is selected when a subsequent group of possible combinations of candidate merge bits is detected or after a predetermined delay, and the selected combination of candidate merge bits is inserted between the two successive data symbols.

    Abstract translation: 在光盘的帧中的符号的调制方法包括以下步骤:接收多个数据字,将每个数据字调制成相应数据符号的码字,并提供要插入的潜在合并位的多个组合 在帧的连续符号之间。 根据潜在的合并位,候选合并位的位置之前的数据符号以及候选合并位的位置之后的数据符号的多个组合,生成候选合并位的至少一个组合。 当检测到候选合并比特的可能组合的后续组或者在预定的延迟之后,选择最小化(优化)绝对累积DSV的候选合并比特的组合,并且将所选择的候选合并比特的组合插入在两个连续的 数据符号。

    Modulation methods and systems
    3.
    发明授权
    Modulation methods and systems 有权
    调制方法和系统

    公开(公告)号:US07397396B2

    公开(公告)日:2008-07-08

    申请号:US11550420

    申请日:2006-10-18

    Abstract: A modulation system includes an encoder for transferring data words to tentative code words. A DSV control bit generator determines the value of a DSV control bit according to the data words or the tentative code words to optimize the cumulative DSVs corresponding tentative code words, wherein the DSV control bit generator determines the value of a current DSV control bit when at least a subsequent DSV control bit is detected. A final code word generator generates final code words according to the determined DSV control bit and the tentative code words.

    Abstract translation: 调制系统包括用于将数据字传送到临时码字的编码器。 DSV控制位发生器根据数据字或暂定码字来确定DSV控制位的值,以优化对应的暂定码字的累积DSV,其中DSV控制位发生器确定当当前DSV控制位的值在 至少检测到随后的DSV控制位。 最终码字发生器根据确定的DSV控制位和暂定码字产生最终码字。

    Modulation Methods and Systems
    4.
    发明申请
    Modulation Methods and Systems 有权
    调制方法与系统

    公开(公告)号:US20070229327A1

    公开(公告)日:2007-10-04

    申请号:US11758655

    申请日:2007-06-05

    Abstract: A modulation method for symbols in a frame of a compact disc includes the steps of receiving a plurality of data words, modulating each data word into a code word of a corresponding data symbol, and providing a plurality of combinations of potential merge bits to be inserted between successive symbols of the frame. At least one combination of candidate merge bits is generated according to the plurality of combinations of potential merge bits, a data symbol immediately preceding the location of the candidate merge bits, and a data symbol immediately succeeding the location of the candidate merge bits. The combination of candidate merge bits which minimizes (optimizes) the absolute cumulative DSV is selected when a subsequent group of possible combinations of candidate merge bits is detected or after a predetermined delay, and the selected combination of candidate merge bits is inserted between the two successive data symbols.

    Abstract translation: 在光盘的帧中的符号的调制方法包括以下步骤:接收多个数据字,将每个数据字调制成相应数据符号的码字,并提供要插入的潜在合并位的多个组合 在帧的连续符号之间。 根据潜在的合并位,候选合并位的位置之前的数据符号以及候选合并位的位置之后的数据符号的多个组合来生成候选合并位的至少一个组合。 当检测到候选合并比特的可能组合的后续组或者在预定的延迟之后,选择最小化(优化)绝对累积DSV的候选合并比特的组合,并且将所选择的候选合并比特的组合插入在两个连续的 数据符号。

    Modulation Methods and Systems
    5.
    发明申请
    Modulation Methods and Systems 有权
    调制方法与系统

    公开(公告)号:US20070080836A1

    公开(公告)日:2007-04-12

    申请号:US11550420

    申请日:2006-10-18

    Abstract: A modulation system includes an encoder for transferring data words to tentative code words. A DSV control bit generator determines the value of a DSV control bit according to the data words or the tentative code words to optimize the cumulative DSVs corresponding tentative code words, wherein the DSV control bit generator determines the value of a current DSV control bit when at least a subsequent DSV control bit is detected. A final code word generator generates final code words according to the determined DSV control bit and the tentative code words.

    Abstract translation: 调制系统包括用于将数据字传送到临时码字的编码器。 DSV控制位发生器根据数据字或暂定码字来确定DSV控制位的值,以优化对应的暂定码字的累积DSV,其中DSV控制位发生器确定当当前DSV控制位的值在 至少检测到随后的DSV控制位。 最终码字发生器根据确定的DSV控制位和暂定码字产生最终码字。

    Modulation methods and systems
    6.
    发明授权
    Modulation methods and systems 有权
    调制方法和系统

    公开(公告)号:US07142135B1

    公开(公告)日:2006-11-28

    申请号:US11162323

    申请日:2005-09-06

    Abstract: In a high-density optical storage system, data words are modulated into code words in a manner of minimizing the fluctuation of the digital sum value (DSV). A cumulative DSV is calculated for each possible value of a DSV control bit. The DSV control bit is determined to minimize the absolute cumulative DSV when detecting at least one subsequent DSV control bit or after a predetermined delay. A corresponding code word is generated according to the determined current DSV control bit.

    Abstract translation: 在高密度光存储系统中,以使数字和值(DSV)的波动最小化的方式将数据字调制成码字。 针对DSV控制位的每个可能值计算累积DSV。 确定DSV控制位以在检测至少一个后续DSV控制位时或在预定延迟之后最小化绝对累积DSV。 根据确定的当前DSV控制位产生相应的代码字。

    Digital delaying device
    7.
    发明授权
    Digital delaying device 有权
    数字延迟装置

    公开(公告)号:US07049874B2

    公开(公告)日:2006-05-23

    申请号:US10695747

    申请日:2003-10-30

    CPC classification number: H04M3/02 H04M2201/14

    Abstract: A digital delaying device for delaying an input signal includes a ring oscillator, a calibration unit, and at least one delay number calculation unit and delay channel. The ring oscillator includes loop-connected delay cells for outputting an oscillation clock. The calibration unit receives a reference clock and the oscillation clock and calculates a pulse number of the oscillation clock corresponding to each reference clock period. The pulse number serves as a period reference pulse number. The calculation unit receives the pulse number and a signal delay value, calculates a signal delay number corresponding to the signal delay value according to the pulse number, and outputs a selection signal. The delay channel includes a multiplexer and cascaded delay cells, which receives an input signal and generates delay signals with different delay timings. The multiplexer selects and outputs one of the delay signals as an output signal according to the selection signal.

    Abstract translation: 用于延迟输入信号的数字延迟装置包括环形振荡器,校准单元和至少一个延迟数计算单元和延迟信道。 环形振荡器包括用于输出振荡时钟的环路连接的延迟单元。 校准单元接收参考时钟和振荡时钟,并计算对应于每个参考时钟周期的振荡时钟的脉冲数。 脉冲数用作周期参考脉冲数。 计算单元接收脉冲数和信号延迟值,根据脉冲数计算与信号延迟值对应的信号延迟数,并输出选择信号。 延迟通道包括多路复用器和级联延迟单元,其接收输入信号并产生具有不同延迟定时的延迟信号。 多路复用器根据选择信号选择并输出一个延迟信号作为输出信号。

    METHOD FOR TRANSMITTING DATA IN A MULTI-CHIP SYSTEM
    8.
    发明申请
    METHOD FOR TRANSMITTING DATA IN A MULTI-CHIP SYSTEM 审中-公开
    用于在多芯片系统中传输数据的方法

    公开(公告)号:US20050172036A1

    公开(公告)日:2005-08-04

    申请号:US10709551

    申请日:2004-05-13

    CPC classification number: G06F13/4208

    Abstract: A multi-chip system has at least a host chip and at least a slave chip. The slave chip informs the host chip of data needed to be transmitted. When informed by the slave chip the host chip informs the slave chip to start to transmit the data, and when informed by the host chip the slave chip starts to transmit the data to the host chip.

    Abstract translation: 多芯片系统至少具有主芯片和至少一个从芯片。 从芯片向主机芯片通知需要发送的数据。 当从机芯片通知主机芯片通知从机芯片开始发送数据时,当主机芯片通知从机芯片开始向主机芯片发送数据时,

    Data processing method and system capable of reducing required memory
    9.
    发明授权
    Data processing method and system capable of reducing required memory 有权
    能够减少所需存储器的数据处理方法和系统

    公开(公告)号:US08112439B2

    公开(公告)日:2012-02-07

    申请号:US12236823

    申请日:2008-09-24

    CPC classification number: H04L27/2614

    Abstract: A data processing system is disclosed. The system includes a processor, a transformer, a first memory buffer, a second memory buffer, a first filter, and a second filter. An obtained transmission signal symbol is first transformed to first data. The first memory buffer stores the first data. The processor obtains peak data based on the first data according to a predetermined threshold. The transformer transforms the peak data to second data and stores the second data in the second memory buffer. The first filter filters the second data to determine reserved data of the second data and removes the reserved data from the second data to generate third data. The transformer transforms the third data to fourth data and stores the fourth data in the second memory buffer. The processor merges the first and fourth data to generate fifth data. The second filter filters the fifth data based on the transmission signal symbol and a previously obtained transmission signal symbol.

    Abstract translation: 公开了一种数据处理系统。 该系统包括处理器,变压器,第一存储器缓冲器,第二存储器缓冲器,第一过滤器和第二过滤器。 获得的发送信号符号首先被变换为第一数据。 第一存储器缓冲器存储第一数据。 处理器根据预定阈值基于第一数据获得峰值数据。 变压器将峰值数据变换为第二数据,并将第二数据存储在第二存储器缓冲器中。 第一滤波器对第二数据进行滤波以确定第二数据的保留数据,并从第二数据中移除预留数据以产生第三数据。 变压器将第三数据变换为第四数据,并将第四数据存储在第二存储器缓冲器中。 处理器合并第一和第四数据以产生第五数据。 第二滤波器基于发送信号符号和先前获得的发送信号符号对第五数据进行滤波。

    Method and apparatus for high speed optical recording
    10.
    发明申请
    Method and apparatus for high speed optical recording 有权
    高速光学记录方法和装置

    公开(公告)号:US20080155377A1

    公开(公告)日:2008-06-26

    申请号:US11643296

    申请日:2006-12-21

    Abstract: An optical storage medium recording apparatus is provided a data preparing and ECC encoding circuit that both prepares the data by combining different categories of data into data sequences in accordance with a data layout on the optical storage medium and encodes the combined data. The encoded data is temporarily stored in a data buffer, and subsequently successively read out by a recording circuit for recording onto the optical storage medium according to the data layout. For a Blu-ray disc recording apparatus, the data preparing and ECC encoding circuit includes a LDC/BIS encoder for generating long distance error correction codes (LDC) and burst indicator subcodes (BIS) from the combined data to form LDC and BIS encoded data, which is temporarily stored in the data buffer. The recording circuit includes an interleave circuit for interleaving the LDC and BIS data to form physical clusters for recording on the disc.

    Abstract translation: 光存储介质记录装置提供有数据准备和ECC编码电路,它们通过根据光学存储介质上的数据布局将不同类别的数据组合成数据序列来准备数据,并对组合的数据进行编码。 编码数据被临时存储在数据缓冲器中,并且随后根据数据布局由用于记录到光存储介质上的记录电路连续地读出。 对于蓝光盘记录装置,数据准备和ECC编码电路包括用于从组合数据生成长距离纠错码(LDC)和突发指示符子码(BIS)的LDC / BIS编码器,以形成LDC和BIS编码数据 ,它暂时存储在数据缓冲区中。 记录电路包括用于交织LDC和BIS数据以形成用于在盘上记录的物理簇的交织电路。

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