公开(公告)号：US20240020229A1

公开(公告)日：2024-01-18

申请号：US18476459

申请日：2023-09-28

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Fengxi LIU ,  Jinxiu LIU ,  Angang DENG

IPC: G06F12/02

CPC classification number: G06F12/0246

Abstract: Embodiments of this application disclose a flash memory access method and apparatus, and relate to the field of chips, so as to alleviate a problem in the conventional technology that a conflict occurs when a plurality of software subsystems running on one chip access a flash memory. A specific solution is: The method is applied to a system on chip including an access controller and a plurality of processor cores, where the plurality of processor cores are separately connected to the access controller through a bus, a plurality of software subsystems run on the plurality of processor cores, different software subsystems run on different processor cores, and a power supply of the access controller is different from power supplies of the plurality of processor cores, or the access controller shares a power supply with a first processor core that runs a first software subsystem.

公开(公告)号：US20140247072A1

公开(公告)日：2014-09-04

申请号：US14194291

申请日：2014-02-28

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jinxiu LIU ,  Shubao GUO ,  Ding LI

IPC: H03K21/02

CPC classification number: H03K21/02 ,  G04G3/04 ,  G06F1/14 ,  G06F1/32 ,  H03L1/00

Abstract: The present invention provides a correction circuit. The correction circuit includes a frequency dividing circuit, a frequency dividing coefficient operation circuit, a built-in temperature collection circuit, and a power-on and power-off detection circuit. The built-in temperature collection circuit is configured to collect a temperature of the chip; the power-on and power-off detection circuit is configured to detect power-on and power-off of the chip; the frequency dividing coefficient operation circuit is configured to calculate, according to the temperature of the chip collected by the built-in temperature collection circuit when the power-on and power-off detection circuit detects that the chip is powered off, a frequency dividing coefficient, and output the frequency dividing coefficient to the frequency dividing circuit; and the frequency dividing circuit is configured to provide, according to the frequency dividing coefficient output by the frequency dividing coefficient operation circuit, a timing pulse for a real-time clock.

Abstract translation: 本发明提供一种校正电路。 校正电路包括分频电路，分频系数运算电路，内置温度采集电路以及通电断电检测电路。 内置的温度采集电路被配置为收集芯片的温度; 上电断电检测电路被配置为检测芯片的上电和断电; 分频系数运算电路被配置为当上电和断电检测电路检测到芯片断电时根据由内置温度采集电路收集的芯片的温度来计算分频系数 并将分频系数输出到分频电路; 并且分频电路被配置为根据由分频系数运算电路输出的分频系数提供实时时钟的定时脉冲。