公开(公告)号：US20220344237A1

公开(公告)日：2022-10-27

申请号：US17862540

申请日：2022-07-12

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Chaojun DENG

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/373

Abstract: A heat dissipation structure includes a peripheral substrate, a chip substrate, a thermally conductive material, and a heat sink. One end of the peripheral substrate is connected to the chip substrate along a periphery of the chip substrate, and the heat sink is connected to the other end of the peripheral substrate. Additionally, an accommodation space is defined among the peripheral substrate, the heat sink, and the chip substrate. The thermally conductive material is filled in the accommodation space, and the chip substrate is configured to place a silicon die. When power consumption of the chip increases, the heat generated by the chip may be dissipated by using the silicon die and the thermally conductive material, so that heat dissipation efficiency is improved, and a heat dissipation effect is improved.

公开(公告)号：US20210212193A1

公开(公告)日：2021-07-08

申请号：US17155324

申请日：2021-01-22

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Chaojun DENG ,  Fei MA ,  Wei FANG ,  Zhiwen YANG ,  Chungang LI ,  Shun HAO

IPC: H05K1/02 ,  G02B6/42 ,  H05K1/18 ,  H05K7/02 ,  H05K7/20

Abstract: A circuit board assembly is applied to the field of electronic communications technologies to resolve a prior-art heat dissipation problem of a circuit board. The circuit board assembly combines, on a second circuit board, low-speed signals transmitted between a plurality of I/O modules and an IC chip, and then transmits the combined low-speed signals to the IC chip by using a low-speed cable. A low-speed signal sent by the IC chip to the plurality of I/O modules is extended to a plurality of low-speed signals on the second circuit board, and then the plurality of low-speed signals are separately sent to the plurality of I/O modules. This may be applied to a scenario in which a relatively large quantity of electronic components need to be disposed on a circuit board.

公开(公告)号：US20240107656A1

公开(公告)日：2024-03-28

申请号：US18372828

申请日：2023-09-26

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Chaojun DENG ,  Fei MA ,  Wei FANG ,  Zhiwen YANG ,  Chungang LI ,  Shun HAO

IPC: H05K1/02 ,  G02B6/42 ,  H05K1/18 ,  H05K7/02 ,  H05K7/20

CPC classification number: H05K1/0203 ,  G02B6/4269 ,  G02B6/4284 ,  H05K1/181 ,  H05K7/023 ,  H05K7/026 ,  H05K7/20409

Abstract: A circuit board assembly is applied to the field of electronic communications technologies to resolve a prior-art heat dissipation problem of a circuit board. The circuit board assembly combines, on a second circuit board, low-speed signals transmitted between a plurality of I/O modules and an IC chip, and then transmits the combined low-speed signals to the IC chip by using a low-speed cable. A low-speed signal sent by the IC chip to the plurality of I/O modules is extended to a plurality of low-speed signals on the second circuit board, and then the plurality of low-speed signals are separately sent to the plurality of I/O modules. This may be applied to a scenario in which a relatively large quantity of electronic components need to be disposed on a circuit board.

公开(公告)号：US20220102164A1

公开(公告)日：2022-03-31

申请号：US17459919

申请日：2021-08-27

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Xiaoyun WEI ,  Yong YANG ,  Chaojun DENG

IPC: H01L21/48 ,  H01L21/683 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00 ,  H01L25/065 ,  H01L23/498

Abstract: Embodiments of the application provide a vertical interconnection structure and a manufacturing method thereof, a packaged chip, and a chip packaging method. Conductive pillars are formed on a first surface of a substrate. A first insulated support layer wrapping the conductive pillars is formed on the first surface of the substrate. The conductive pillars are located in the first insulated support layer. An upper surface of the conductive pillar that is away from the substrate is not covered by the first insulated support layer. Then the substrate is removed.

公开(公告)号：US20200343975A1

公开(公告)日：2020-10-29

申请号：US16923383

申请日：2020-07-08

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Chaojun DENG ,  Liankui LIN

IPC: H04B10/272 ,  H04Q11/00

Abstract: This application discloses a communications network and a related device. In one embodiment, the communications network includes a first optical line terminal and a second optical line terminal. The first optical line terminal is configured to send, through a first passive optical network (PON) interface based on a first PON protocol, a first optical signal to the at least one second optical line terminal. The second optical line terminal is configured to process the first optical signal and send through a second PON interface based on a second PON protocol, a processed first optical signal to at least one customer-premises equipment during downstream data transmissions, and process a second optical signal and send, through the first PON interface based on the first PON protocol, the processed second optical signal to the first optical line terminal during upstream data transmissions.

公开(公告)号：US20220216171A1

公开(公告)日：2022-07-07

申请号：US17560583

申请日：2021-12-23

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Chaojun DENG ,  Xiaoyun WEI ,  Yong YANG

IPC: H01L23/00 ,  H01L23/15 ,  H01L23/498 ,  H01L25/065

Abstract: A chip package structure includes a glass substrate, a routing layer, and a plurality of dies. A first surface of the glass substrate has solder joints and a second surface of the glass substrate has substrate solder balls. The routing layer is located in the glass substrate, and the solder joints are electrically connected to the substrate solder balls by using the routing layer. Each die has chip solder balls, is located on the first surface of the glass substrate, and the solder joints are bonded to the chip solder balls. The embodiments can improve connection reliability between the die and the glass substrate and can reduce a signal transmission loss.

公开(公告)号：US20220102237A1

公开(公告)日：2022-03-31

申请号：US17473673

申请日：2021-09-13

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Chaojun DENG ,  Xiaoyun WEI ,  Yong YANG ,  Jiye XU ,  Xing FU

IPC: H01L23/367 ,  H01L23/498 ,  H01L23/00

Abstract: Embodiments of this application provide a chip and a manufacturing method thereof, and an electronic device, and belong to the field of chip heat dissipation technologies. The chip includes a die and a thermal conductive sheet. An active surface of the die is connected to the thermal conductive sheet by using a first bonding layer. Heat generated at a part with a relatively high temperature on the active surface of the die can be quickly conducted and dispersed by using the thermal conductive sheet, so that temperatures on the active surface are evenly distributed to avoid an excessively high local temperature of the chip, thereby preventing running of the chip from being affected.