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    Interface module with on-board power-consumption monitoring
    4.
    发明申请
    Interface module with on-board power-consumption monitoring 有权

    公开(公告)号：US20060248366A1

    公开(公告)日：2006-11-02

    申请号：US11118654

    申请日：2005-04-29

    Applicant: Derek Schumacher ,  Idis Martinez

    Inventor： Derek Schumacher ,  Idis Martinez

    IPC: G06F1/00

    CPC classification number: G06F1/28

    Abstract: An interface module for interfacing an external device with a host computer is physically and electrically connected to the host computer. The module monitors its own power consumption and reports its power consumption to the host computer. This information can be used to determine the total power consumed by multiple modules, to indicate a problem with the interface module, or to detect a leakage current associated with the external device when main power is off.

    Method for changing computer system memory density
    5.
    发明授权
    Method for changing computer system memory density 有权
    改变计算机系统内存密度的方法

    公开(公告)号：US07065626B2

    公开(公告)日：2006-06-20

    申请号：US10193774

    申请日：2002-07-10

    Applicant: Derek Schumacher ,  Vince Leung

    Inventor： Derek Schumacher ,  Vince Leung

    IPC: G06F12/00

    CPC classification number: G06F21/57 ,  G06F9/4411

    Abstract: A method for changing computer system memory density. It is determined whether a memory unit is scalable to provide a first memory density and a second memory density. Information is received authorizing a change in the memory density. The firmware is updated to indicate the change in memory density.

    Abstract translation: 一种改变计算机系统内存密度的方法。 确定存储器单元是否可缩放以提供第一存储器密度和第二存储器密度。 收到信息，授权更改内存密度。 更新固件以指示内存密度的变化。

    Memory module with on-board power-consumption monitoring
    6.
    发明申请
    Memory module with on-board power-consumption monitoring 有权
    具有板载功耗监控的内存模块

    公开(公告)号：US20060230295A1

    公开(公告)日：2006-10-12

    申请号：US11102220

    申请日：2005-04-08

    Applicant: Derek Schumacher ,  Idis Martinez

    Inventor： Derek Schumacher ,  Idis Martinez

    IPC: G06F1/26

    CPC classification number: G06F1/28

    Abstract: A memory module includes memory devices and a power tracker for monitoring power consumption by the memory devices. The power tracker generates digital power consumption data that can be stored and used to anticipate and/or diagnose of power-related problems. The invention allows accurate monitoring of conditions that could otherwise lead to failure and provides a source of diagnostic data in the event of system failure related to excessive power consumption. Modules that self-monitor power consumption can provide highly accurate data to the user and/or the system, which has significant advantages over error-prone theoretical measurements or estimations.

    Abstract translation: 存储器模块包括用于监视存储器件的功率消耗的存储器件和功率跟踪器。 电力跟踪器产生可被存储并用于预测和/或诊断电力相关问题的数字功耗数据。 本发明允许准确监测否则可能导致故障的条件，并且在与过度功率消耗相关的系统故障的情况下提供诊断数据源。 自我监测功耗的模块可以向用户和/或系统提供高精确度的数据，这比易出错的理论测量或估计具有显着的优点。

    Termination stub system and method
    7.
    发明申请
    Termination stub system and method 审中-公开
    终止存根系统和方法

    公开(公告)号：US20050062554A1

    公开(公告)日：2005-03-24

    申请号：US10671120

    申请日：2003-09-24

    Applicant: Mike Cogdill ,  Idis Martinez ,  Derek Schumacher

    Inventor： Mike Cogdill ,  Idis Martinez ,  Derek Schumacher

    IPC: H03H7/38 ,  H01P1/26

    CPC classification number: H03H7/38

    Abstract: A present invention termination stub system is disclosed. In one embodiment the termination stub system includes a first resistor, a division point, and a second resistor. The first resistor dampens reflections of a signal and is in series with an input signal path. The division point is coupled to the first resistor. The division point divides the signal into a plurality of output communication paths. The second resistor balances resistance of the termination stub system with a characteristic impedance of the signal input path. The second resistor is coupled to the first resistor in parallel with the input signal path and the plurality of output communication paths.

    Abstract translation: 公开了本发明的终止桩系统。 在一个实施例中，终止短截线系统包括第一电阻器，分割点和第二电阻器。 第一个电阻抑制信号的反射并与输入信号路径串联。 分割点耦合到第一电阻器。 分割点将信号分割成多个输出通信路径。 第二个电阻使终端短线系统的电阻与信号输入路径的特征阻抗相平衡。 第二电阻器与输入信号路径和多个输出通信路径并联连接到第一电阻器。

    Hiding logical processors from an operating system on a computer
    8.
    发明授权
    Hiding logical processors from an operating system on a computer 有权

    公开(公告)号：US09697008B2

    公开(公告)日：2017-07-04

    申请号：US14378971

    申请日：2012-02-22

    Applicant: Derek Schumacher

    Inventor： Derek Schumacher

    IPC: G06F9/44 ,  G06F11/22

    CPC classification number: G06F9/4405 ,  G06F9/4403 ,  G06F11/2284

    Abstract: Hiding logical processors from an operating system (OS) of a computer is described. In an example, a method of hiding at least one logical processor in a computer having a plurality of logical processors includes: initializing the plurality of logical processors by executing a pre-boot routine in system firmware; identifying at least one logical processor of the plurality of logical processors to be hidden from an operating system (OS) of the computer to provide at least one hidden logical processor and at least one visible logical processor; placing each of the at least one hidden logical processor into a system management mode (SMM) by executing a park routine in the system firmware; and booting the OS of the computer to use the at least one visible logical processor.

    HIDING LOGICAL PROCESSORS FROM AN OPERATING SYSTEM ON A COMPUTER
    9.
    发明申请
    HIDING LOGICAL PROCESSORS FROM AN OPERATING SYSTEM ON A COMPUTER 有权
    在计算机上隐藏操作系统的逻辑处理器

    公开(公告)号：US20150033006A1

    公开(公告)日：2015-01-29

    申请号：US14378971

    申请日：2012-02-22

    Applicant: Derek Schumacher

    Inventor： Derek Schumacher

    IPC: G06F9/44 ,  G06F11/22

    CPC classification number: G06F9/4405 ,  G06F9/4403 ,  G06F11/2284

    Abstract: Hiding logical processors from an operating system (OS) of a computer is described. In an example, a method of hiding at least one logical processor in a computer having a plurality of logical processors includes: initializing the plurality of logical processors by executing a pre-boot routine in system firmware; identifying at least one logical processor of the plurality of logical processors to be hidden from an operating system (OS) of the computer to provide at least one hidden logical processor and at least one visible logical processor; placing each of the at least one hidden logical processor into a system management mode (SMM) by executing a park routine in the system firmware; and booting the OS of the computer to use the at least one visible logical processor.

    Abstract translation: 描述从计算机的操作系统（OS）隐藏逻辑处理器。 在一个示例中，在具有多个逻辑处理器的计算机中隐藏至少一个逻辑处理器的方法包括：通过在系统固件中执行预引导例程来初始化多个逻辑处理器; 识别要从所述计算机的操作系统（OS）隐藏的所述多个逻辑处理器中的至少一个逻辑处理器，以提供至少一个隐藏的逻辑处理器和至少一个可视逻辑处理器; 通过在系统固件中执行驻留例程将所述至少一个隐藏的逻辑处理器中的每一个置于系统管理模式（SMM）中; 以及引导所述计算机的OS以使用所述至少一个可视逻辑处理器。

    DIMM and method for producing a DIMM
    10.
    发明授权
    DIMM and method for producing a DIMM 失效
    DIMM及其制造方法

    公开(公告)号：US06990640B2

    公开(公告)日：2006-01-24

    申请号：US10698686

    申请日：2003-10-31

    Applicant: Patricia Brown ,  Derek Schumacher ,  Vince Leung

    Inventor： Patricia Brown ,  Derek Schumacher ,  Vince Leung

    IPC: G06F17/50

    CPC classification number: G11C5/04 ,  G11C29/88

    Abstract: A method for producing a DIMM having a reduced memory capacity. The method includes determining an amount by which a memory capacity of a DIMM can be reduced, and reducing the memory capacity of the DIMM in accordance with the determined amount to produce a DIMM having a reduced memory capacity which is available for use and a dormant memory capacity which is not available for use. A DIMM produced in accordance with the method. A computer assembly having a computer, and a DIMM disposed in the computer and having reduced memory capacity.

    Abstract translation: 一种具有减小的存储容量的DIMM的制造方法。 该方法包括确定可以减少DIMM的存储器容量的量，以及根据所确定的量来降低DIMM的存储器容量以产生具有可用的减小的存储容量的DIMM和休眠存储器 容量不可用。 根据该方法制造的DIMM。 具有计算机的计算机组件和设置在计算机中并具有降低的存储器容量的DIMM。

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