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公开(公告)号：US20220128762A1
公开(公告)日：2022-04-28
申请号：US17082291
申请日：2020-10-28
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor： Yusheng Bian , Ryan W. Sporer , Karen A. Nummy
IPC: G02B6/122
Abstract: Structures and methods implement an enlarged waveguide. The structure may include a semiconductor-on-insulator (SOI) substrate including a semiconductor-on-insulator (SOI) layer over a buried insulator layer over a semiconductor substrate. An inter-level dielectric (ILD) layer is over the SOI substrate. A first waveguide has a lower surface extending at least partially into the buried insulator layer, which allows vertical enlargement of the waveguide, without increasing the thickness of the ILD layer or increasing the length of interconnects to other devices. The enlarged waveguide may include nitride, and can be implemented with other conventional silicon and nitride waveguides.
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2.发明授权公开(公告)号：US11837851B2
公开(公告)日：2023-12-05
申请号：US17931933
申请日：2022-09-14
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor： Yusheng Bian , Roderick A. Augur , Michal Rakowski , Kenneth J. Giewont , Karen A. Nummy
CPC classification number: H01S5/2018 , H01S5/20 , H01S5/2231 , H01S5/2232 , H01S5/3013 , H01S5/021 , H01S5/026 , H01S5/3054 , H01S5/32333
Abstract: A laser structure, including: a dielectric matrix formed of a first material; a laser source formed within the dielectric matrix and formed of a semiconductor material; and a plurality of side confining features formed within the dielectric matrix and extending parallel to and along a length of the laser source. The plurality of side confining features are formed of the semiconductor material.
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公开(公告)号：US11587888B2
公开(公告)日：2023-02-21
申请号：US16713709
申请日：2019-12-13
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor： Asli Sahin , Thomas F. Houghton , Jennifer A. Oakley , Jeremy S. Alderman , Karen A. Nummy , Zhuojie Wu
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a moisture seal for photonic devices and methods of manufacture. The structure includes: a first trench in at least one substrate material; a guard ring structure with an opening and which at least partially surrounds the first trench; and a second trench at a dicing edge of the substrate, the second trench being lined on sidewalls with barrier material and spacer material over the barrier material.
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4.发明申请公开(公告)号：US20230011972A1
公开(公告)日：2023-01-12
申请号：US17931933
申请日：2022-09-14
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor： Yusheng Bian , Roderick A. Augur , Michal Rakowski , Kenneth J. Giewont , Karen A. Nummy
Abstract: A laser structure, including: a dielectric matrix formed of a first material; a laser source formed within the dielectric matrix and formed of a semiconductor material; and a plurality of side confining features formed within the dielectric matrix and extending parallel to and along a length of the laser source. The plurality of side confining features are formed of the semiconductor material.
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5.发明授权公开(公告)号：US11515685B2
公开(公告)日：2022-11-29
申请号：US17167201
申请日：2021-02-04
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor： Yusheng Bian , Roderick A. Augur , Michal Rakowski , Kenneth J. Giewont , Karen A. Nummy
Abstract: A laser structure, including: a dielectric matrix formed of a first material; a laser source formed within the dielectric matrix and formed of a semiconductor material; and a plurality of side confining features formed within the dielectric matrix and extending parallel to and along a length of the laser source. The plurality of side confining features are formed of the semiconductor material.
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Patent Agency Ranking
公开(公告)号：US11487059B2
公开(公告)日：2022-11-01
申请号：US17179532
申请日：2021-02-19
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor： Asli Sahin , Karen A. Nummy , Thomas Houghton , Kevin K. Dezfulian , Kenneth J. Giewont , Yusheng Bian
Abstract: A photonics integrated circuit includes a semiconductor substrate; a buried insulator layer positioned over the semiconductor substrate; and a back-end-of-line (BEOL) insulator stack over a first portion of the buried insulator layer. In addition, the PIC includes a silicon nitride (SiN) waveguide edge coupler positioned in a first region over the buried insulator layer and at least partially under the BEOL insulator stack. An oxide layer extends over a side of the BEOL insulator stack. The SiN waveguide edge coupler provides better power handling and fabrication tolerance than silicon waveguide edge couplers, despite the location under various BEOL layers. The PIC can also include silicon waveguide edger coupler(s).
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公开(公告)号：US20240094465A1
公开(公告)日：2024-03-21
申请号：US17932868
申请日：2022-09-16
Applicant: GlobalFoundries U.S. Inc.
Inventor： Yusheng Bian , Mark D. Levy , Siva P. Adusumilli , Karen A. Nummy , Zhuojie Wu , Ramsey Hazbun
CPC classification number: G02B6/1228 , G02B6/13
Abstract: The disclosure relates to a PIC structure including a photonic component on a semiconductor substrate. Each of a plurality of optical guard elements are composed of a light absorbing material and are in proximity to the photonic component. The optical guard elements may mimic an outer periphery of at least a portion of the photonic component. The optical guard elements may include at least one of: a germanium body positioned at least partially in a silicon element, a silicon body having a high dopant concentration, and a polysilicon body having a high dopant concentration over the silicon body.
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公开(公告)号：US11810870B2
公开(公告)日：2023-11-07
申请号：US18146039
申请日：2022-12-23
Applicant: GlobalFoundries U.S. Inc.
Inventor： Asli Sahin , Thomas F. Houghton , Jennifer A. Oakley , Jeremy S. Alderman , Karen A. Nummy , Zhuojie Wu
CPC classification number: H01L23/564 , G02B6/4243 , G02B6/4248 , G02B6/4251 , H01L23/562 , G02B6/12 , G02B2006/12061
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a moisture seal for photonic devices and methods of manufacture. The structure includes: a first trench in at least one substrate material; a guard ring structure with an opening and which at least partially surrounds the first trench; and a second trench at a dicing edge of the substrate, the second trench being lined on sidewalls with barrier material and spacer material over the barrier material.
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公开(公告)号：US20220268994A1
公开(公告)日：2022-08-25
申请号：US17179532
申请日：2021-02-19
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor： Asli Sahin , Karen A. Nummy , Thomas Houghton , Kevin K. Dezfulian , Kenneth J. Giewont , Yusheng Bian
Abstract: A photonics integrated circuit includes a semiconductor substrate; a buried insulator layer positioned over the semiconductor substrate; and a back-end-of-line (BEOL) insulator stack over a first portion of the buried insulator layer. In addition, the PIC includes a silicon nitride (SiN) waveguide edge coupler positioned in a first region over the buried insulator layer and at least partially under the BEOL insulator stack. An oxide layer extends over a side of the BEOL insulator stack. The SiN waveguide edge coupler provides better power handling and fabrication tolerance than silicon waveguide edge couplers, despite the location under various BEOL layers. The PIC can also include silicon waveguide edger coupler(s).
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10.发明授权公开(公告)号：US11409037B2
公开(公告)日：2022-08-09
申请号：US17082291
申请日：2020-10-28
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor： Yusheng Bian , Ryan W. Sporer , Karen A. Nummy
Abstract: Structures and methods implement an enlarged waveguide. The structure may include a semiconductor-on-insulator (SOI) substrate including a semiconductor-on-insulator (SOI) layer over a buried insulator layer over a semiconductor substrate. An inter-level dielectric (ILD) layer is over the SOI substrate. A first waveguide has a lower surface extending at least partially into the buried insulator layer, which allows vertical enlargement of the waveguide, without increasing the thickness of the ILD layer or increasing the length of interconnects to other devices. The enlarged waveguide may include nitride, and can be implemented with other conventional silicon and nitride waveguides.
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