公开(公告)号：US20140192824A1

公开(公告)日：2014-07-10

申请号：US14064590

申请日：2013-10-28

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Woo Yong LEE ,  Jin Kyeong KIM ,  Kyeongpyo KIM ,  Hyoung Jin KWON ,  Yong Sun KIM ,  Jae Sup LEE ,  Dongyong LEE ,  Min Taig KIM ,  Seung ku HWANG

IPC: H04L1/00

CPC classification number: H04L1/0041 ,  H04L1/007 ,  H04L1/0089 ,  H04N21/631

Abstract: Disclosed are an apparatus and method for transmitting/receiving image data. The method for transmitting image data includes classifying each pixel of image data into upper bits and lower bits, enabling the classified upper bits to be included in a payload of a Most Significant Bit (MSB) packet, and also enabling the classified lower bits to be included in a payload of a Least Significant Bit (LSB) packet, generating a header of the MSB packet and a header of the LSB packet, combining the payload and the header to respectively generate the MSB packet and the LSB packet, and transmitting the generated MSB packet and the LSB packet.

Abstract translation: 公开了一种用于发送/接收图像数据的装置和方法。 用于发送图像数据的方法包括将图像数据的每个像素分类为高位和低位，使分类的高位能够被包含在最高有效位（MSB）分组的有效载荷中，并且还使分类的较低位成为 包括在最低有效位（LSB）分组的有效载荷中，生成MSB分组的报头和LSB分组的报头，组合有效载荷和报头以分别生成MSB分组和LSB分组，并且发送所生成的 MSB数据包和LSB数据包。

公开(公告)号：US20150288613A1

公开(公告)日：2015-10-08

申请号：US14626943

申请日：2015-02-20

Applicant: Electronics and Telecommunications Research Institute

Inventor： Yool KWON ,  Min Taig KIM

IPC: H04L12/863 ,  H04L12/825 ,  H04L12/26

CPC classification number: H04L49/3027 ,  H04L43/0894 ,  H04L49/3045 ,  H04L49/506

Abstract: Provided are a packet switch system in which an input module and an output module measure a buffer state and a packet delivery rate to control traffic, regardless of a size or a function of a switch fabric, and a traffic control method thereof. The packet switch system includes an input unit including a plurality of input modules, an output unit including a plurality of output modules, and a switch fabric including a plurality of switch components and configured to receive a packet delivered from the input unit and deliver the received packet to the output unit, wherein each of the input module includes: a plurality of virtual output queues (VOQs); and an access controller configured to selectively output packets stored in the plurality of VOQs in a weighted round robin (WRR) manner.

Abstract translation: 提供了一种分组交换系统，其中输入模块和输出模块测量缓冲状态和分组传送速率以控制流量，而不管交换结构的大小或功能如何，以及其交通控制方法。 分组交换机系统包括包括多个输入模块的输入单元，包括多个输出模块的输出单元和包括多个开关组件的交换结构，并且被配置为接收从输入单元传送的分组并传送所接收的 分组到所述输出单元，其中所述输入模块中的每一个包括：多个虚拟输出队列（VOQ）; 以及访问控制器，被配置为以加权循环（WRR）方式选择性地输出存储在所述多个VOQ中的分组。